Rev. 1.10
140
November 04, 2019
Rev. 1.10
141
November 04, 2019
HT45F5Q-3
Battery Charger Flash MCU
HT45F5Q-3
Battery Charger Flash MCU
When an interrupt is generated, the Program Counter, which stores the address of the next instruction
to be executed, will be transferred onto the stack. The Program Counter will then be loaded with a
new address which will be the value of the corresponding interrupt vector. The microcontroller will
then fetch its next instruction from this interrupt vector. The instruction at this vector will usually
be a “JMP” which will jump to another section of program which is known as the interrupt service
routine. Here is located the code to control the appropriate interrupt. The interrupt service routine
must be terminated with a “RETI”, which retrieves the original Program Counter address from
the stack and allows the microcontroller to continue with normal execution at the point where the
interrupt occurred.
The various interrupt enable bits, together with their associated request flags, are shown in the
accompanying diagrams with their order of priority. Some interrupt sources have their own
individual vector while others share the same multi-function interrupt vector. Once an interrupt
subroutine is serviced, all the other interrupts will be blocked, as the global interrupt enable bit,
EMI bit will be cleared automatically. This will prevent any further interrupt nesting from occurring.
However, if other interrupt requests occur during this interval, although the interrupt will not be
immediately serviced, the request flag will still be recorded.
If an interrupt requires immediate servicing while the program is already in another interrupt service
routine, the EMI bit should be set after entering the routine, to allow interrupt nesting. If the stack
is full, the interrupt request will not be acknowledged, even if the related interrupt is enabled, until
the Stack Pointer is decremented. If immediate service is desired, the stack must be prevented from
becoming full. In case of simultaneous requests, the accompanying diagram shows the priority that
is applied. All of the interrupt request flags when set will wake-up the device if it is in SLEEP or
IDLE Mode, however to prevent a wake-up from occurring the corresponding flag should be set
before the device is in SLEEP or IDLE Mode
.
Interrupt
Name
Request
Flags
Enable
Bits
Master
Enable
Vector
EMI auto disabled in ISR
Priority
High
Low
Interrupts contained within
Multi-Function Interrupts
10H
0CH
08H
18H
Interrupt
Name
Request
Flags
Enable
Bits
CTM P
CTMPF
CTMPE
CTM A
CTMAF
CTMAE
14H
1CH
xxE Enable Bits
xxF
Request Flag, auto reset in ISR
Legend
xxF
Request Flag, no auto reset in ISR
USIM
USIMF
USIME
EMI
INT0 Pin
INT0F
INT0E
EMI
INT1 Pin
INT1F
INT1E
EMI
Time Base 1
TB1F
TB1E
EMI
EMI
Time Base 0
TB0F
TB0E
M. Funct. 0
MF0F
MF0E
EMI
M. Funct. 1
MF1F
MF1E
EMI
EMI
A/D
ADF
ADE
04H
20H
STM P
STMPF
STMPE
STM A
STMAF
STMAE
Interrupt Structure
