Rev. 1.10
38
November 04, 2019
Rev. 1.10
39
November 04, 2019
HT45F5Q-3
Battery Charger Flash MCU
HT45F5Q-3
Battery Charger Flash MCU
FAST Mode
This is one of the main operating modes where the microcontroller has all of its functions
operational and where the system clock is provided by the high speed oscillator. This mode operates
allowing the microcontroller to operate normally with a clock source will come from the high speed
oscillator HIRC. The high speed oscillator will however first be divided by a ratio ranging from 1
to 64, the actual ratio being selected by the CKS2~CKS0 bits in the SCC register. Although a high
speed oscillator is used, running the microcontroller at a divided clock ratio reduces the operating
current.
SLOW Mode
This is also a mode where the microcontroller operates normally although now with a slower speed
clock source. The clock source used will be from f
SUB
. The f
SUB
clock is derived from the LIRC
oscillator
.
Running the microcontroller in this mode allows it to run with much lower operating
currents
SLEEP Mode
The SLEEP Mode is entered when a HALT instruction is executed and when the FHIDEN and
FSIDEN bits are low. In the SLEEP mode the CPU will be stopped. The f
SUB
clock provided to the
peripheral function will also be stopped, too. However the f
LIRC
clock can continues to operate if the
WDT function is enabled.
IDLE0 Mode
The IDLE0 Mode is entered when a HALT instruction is executed and when the FHIDEN bit in
the SCC register is low and the FSIDEN bit in the SCC register is high. In the IDLE0 Mode the
CPU will be switched off but the low speed oscillator will be turned on to drive some peripheral
functions.
IDLE1 Mode
The IDLE1 Mode is entered when a HALT instruction is executed and when the FHIDEN bit in the
SCC register is high and the FSIDEN bit in the SCC register is high. In the IDLE1 Mode the CPU
will be switched off but both the high and low speed oscillators will be turned on to provide a clock
source to keep some peripheral functions operational.
IDLE2 Mode
The IDLE2 Mode is entered when a HALT instruction is executed and when the FHIDEN bit in the
SCC register is high and the FSIDEN bit in the SCC register is low. In the IDLE2 Mode the CPU
will be switched off but the high speed oscillator will be turned on to provide a clock source to keep
some peripheral functions operational.
Control Registers
The registers, SCC and HIRCC, are used to control the system clock and the corresponding
oscillator configurations.
Register
Name
Bit
7
6
5
4
3
2
1
0
SCC
CKS2
CKS1
CKS0
—
—
—
FHIDEN FSIDEN
HIRCC
—
—
—
—
—
—
HIRCF
HIRCEN
System Operating Mode Control Register List
