Rev. 1.10
122
November 04, 2019
Rev. 1.10
123
November 04, 2019
HT45F5Q-3
Battery Charger Flash MCU
HT45F5Q-3
Battery Charger Flash MCU
• UUCR2 Register
The UUCR2 register is the second of the two UART control registers and serves several purposes.
One of its main functions is to control the basic enable/disable operation of the UART Transmitter
and Receiver as well as enabling the various USIM UART mode interrupt sources. The register also
serves to control the baud rate speed, receiver wake-up enable and the address detect enable. Further
explanation on each of the bits is given below:
Bit
7
6
5
4
3
2
1
0
Name
UTXEN
URXEN
UBRGH UADDEN UWAKE
URIE
UTIIE
UTEIE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
POR
0
0
0
0
0
0
0
0
Bit 7
UTXEN
: UART Transmitter enabled control
0: UART transmitter is disabled
1: UART transmitter is enabled
The bit named UTXEN is the Transmitter Enable Bit. When this bit is equal to “0”,
the transmitter will be disabled with any pending data transmissions being aborted. In
addition the buffers will be reset. In this situation the TX pin will be set in a floating
state.
If the UTXEN bit is equal to “1” and the UMD and UREN bit are also equal to
“1”, the transmitter will be enabled and the TX pin will be controlled by the UART.
Clearing the UTXEN bit during a transmission will cause the data transmission to be
aborted and will reset the transmitter. If this situation occurs, the TX pin will be set in
a floating state.
Bit 6
URXEN
: UART Receiver enabled control
0: UART receiver is disabled
1: UART receiver is enabled
The bit named URXEN is the Receiver Enable Bit. When this bit is equal to “0”, the
receiver will be disabled with any pending data receptions being aborted. In addition
the receive buffers will be reset. In this situation the RX pin will be set in a floating
state. If the URXEN bit is equal to “1” and the UMD and UREN bit are also equal to “1”,
the receiver will be enabled and the RX pin will be controlled by the UART. Clearing
the URXEN bit during a reception will cause the data reception to be aborted and will
reset the receiver. If this situation occurs, the RX pin will be set in a floating state.
Bit 5
UBRGH
: Baud Rate speed selection
0: Low speed baud rate
1: High speed baud rate
The bit named UBRGH selects the high or low speed mode of the Baud Rate
Generator. This bit, together with the value placed in the baud rate register UBRG,
controls the Baud Rate of the UART. If this bit is equal to “1”, the high speed mode is
selected. If the bit is equal to “0”, the low speed mode is selected.
Bit 4
UADDEN
: Address detect function enable control
0: Address detect function is disabled
1: Address detect function is enabled
The bit named UADDEN is the address detect function enable control bit. When this
bit is equal to “1”, the address detect function is enabled. When it occurs, if the 8th bit,
which corresponds to UTXR_RXR.7 if UBNO=0 or the 9th bit, which corresponds to
URX8 if UBNO=1, has a value of “1”, then the received word will be identified as an
address, rather than data. If the corresponding interrupt is enabled, an interrupt request
will be generated each time the received word has the address bit set, which is the 8th
or 9th bit depending on the value of UBNO. If the address bit known as the 8th or
9th bit of the received word is “0” with the address detect function being enabled, an
interrupt will not be generated and the received data will be discarded.
