Hitachi H8/3660, Hardware Manual

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15.1.4 Register Configuration
Table 15.2 summarizes the registers of the I
2
C bus interface.
Table 15.2 Register Configuration
Name Abbreviation R/W Initial Value Address
I
2
C bus control register ICCR R/W H'01 H'FFC4
I
2
C bus status register ICSR R/W H'00 H'FFC5
I
2
C bus data register ICDR R/W Undefined H'FFC6
*
I
2
C bus mode register ICMR R/W H'00 H'FFC7
*
Slave address register SAR R/W H'00 H'FFC7 *
Second slave address register SARX R/W H'01 H'FFC6
*
Timer serial control register TSCR R/W H'00 H'FFFC
Note:
*
The register that can be written or read depends on the ICE bit in the I
2
C bus control
register. The slave address register can be accessed when ICE = 0, and the I
2
C bus mode
register can be accessed when ICE = 1.