Hitachi H8/3660, Hardware Manual

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Bits 1 and 0—Clock Select 1, 0 (CKS1, CKS0): Bits 1 and 0 choose
ø
/64,
ø
/16,
ø
/4, or
ø
as the
clock source for the baud rate generator.
For the relation between the clock source, bit rate register setting, and baud rate, see section
14.2.8, Bit Rate Register (BRR). The set value of n is in decimal notation, and represents a value
of n in section 14.2.8, bit rate register (BRR).
Bit 1: CKS1 Bit 0: CKS0 Description
0 0 ø clock (n = 0) (Initial value)
1 ø/4 clock (n = 1)
1 0 ø/16 clock (n = 2)
1 ø/64 clock (n = 3)
14.2.6 Serial Control Register 3 (SCR3)
Bit 7 6 5 4 3 2 1 0
TIE RIE TE RE MPIE TEIE CKE1 CKE0
Initial value 0 0 0 0 0 0 0 0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
SCR3 is an 8-bit register for selecting transmit or receive operation, the asynchronous mode clock
output, interrupt request enabling or disabling, and the transmit/receive clock source.
SCR3 can be read or written by the CPU at any time.
SCR3 is initialized to H'00 upon reset, and in standby, subactive, or subsleep mode.
Bit 7—Transmit interrupt Enable (TIE): Bit 7 selects enabling or disabling of the transmit data
empty interrupt request (TXI) when transmit data is transferred from the transmit data register
(TDR) to the transmit shift register (TSR), and bit TDRE in the serial status register (SSR) is set to
1.
TXI can be released by clearing bit TDRE or bit TIE to 0.
Bit 7: TIE Description
0 Transmit data empty interrupt request (TXI) disabled (Initial value)
1 Transmit data empty interrupt request (TXI) enabled