195
12.1.4
Register Configuration
Table 12.3 summarizes the timer W registers.
Table 12.3
Timer W Registers
Name
Abbreviation
R/W
Initial Value
Address
Timer mode register W
TMRW
R/W
H'48
H'FF80
Timer control register W
TCRW
R/W
H'00
H'FF81
Timer interrupt enable register W
TIERW
R/W
H'70
H'FF82
Timer status register W
TSRW
R/(W)
*
1
H'70
H'FF83
Timer I/O control register 0
TIOR0
R/W
H'88
H'FF84
Timer I/O control register 1
TIOR1
R/W
H'88
H'FF85
Timer counter
TCNT
R/W
H'0000
H'FF86
*
2
General register A
GRA
R/W
H'FFFF
H'FF88
*
2
General register B
GRB
R/W
H'FFFF
H'FF8A
*
2
General register C
GRC
R/W
H'FFFF
H'FF8C
*
2
General register D
GRD
R/W
H'FFFF
H'FF8E
*
2
Notes: 1. Only 0 can be written to clear the flags.
2. Must be always read or written in 16-bit units; 8-bit access is not allowed.
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