Hitachi H8/3660, Hardware Manual

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7.2.5 Register Configuration
The registers used to control the on-chip flash memory when enabled are shown in table 7.2.
Table 7.2 Register Configuration
Register Name Abbreviation R/W Initial Value Address
Flash memory control register 1 FLMCR1 R/W
*
1
H'00 H'FF90
Flash memory control register 2 FLMCR2 R
*
1
H'00 H'FF91
Erase block register 1 EBR1 R/W
*
1
H'00
*
2
H'FF93
Flash memory power control register FLPWCR R/W
*
1
H'00
*
2
H'FF92
Flash memory enable register FENR R/W H'00 H'FF9B
Notes: 1. To access these registers, set the FLSHE bit to 1 in the flash memory enable register.
2. When the SWE bit of FLMCR1 is not set, these registers are initialized to H'00.
7.3 Register Descriptions
7.3.1 Flash Memory Control Register 1 (FLMCR1)
FLMCR1 is an 8-bit register used for flash memory operating mode control. Program-verify mode
or erase-verify mode is entered by setting the SWE bit to 1, then setting the PV or EV bit. Program
mode is entered by setting the SWE bit to 1, then setting the PSU bit, and finally setting the P bit.
Erase mode is entered by setting the SWE bit to 1, then setting the ESU bit, and finally setting the
E bit. FLMCR1 is initialized to H'00 by a power-on reset, or is initialized in standby mode.
Bit 7 6 5 4 3 2 1 0
— SWE ESU PSU EV PV E P
Initial value 0 0 0 0 0 0 0 0
Read/Write — R/W R/W R/W R/W R/W R/W R/W
Bit 7—Reserved: This bit always reads 0.
Bit 6—Software Write Enable Bit (SWE): Enables or disables flash memory programming and
erasing. Set this bit before setting bits 5 to 0 of this register and bits 4 to 0 of EBR1.
Bit 6: SWE Description
0 Write disabled (Initial value)
1 Write enabled