GE P4A, Technical Manual, Page: 760 / 850

Appendix B - Settings and Signals P54A/B/C/E
B194 P54xMED-TM-EN-1
MENU TEXT COL ROW DEFAULT SETTING AVAILABLE OPTIONS
DESCRIPTION
CS1 Angle 48 90 20
From 0 to 90 in steps of 1
[Courier Number (angle)]
Maximum permitted phase angle between Line and Bus 1 voltages for first stage synchronism check element to reclose CB.
CB1 CS1 Angle 48 90 20
From 0 to 90 in steps of 1
[Courier Number (angle)]
Maximum permitted phase angle between Line and Bus 1 voltages for first stage synchronism check element to reclose CB1.
CS1 VDiff 48 91 6.5
From 1 to 120 in steps of 0.5
[Courier Number (voltage)]
Check Synch Voltage differential setting decides that stage 1 System Check Synchronism logic is blocked if Vdiff> is one of the selected
options in setting CS Voltage Block (48 8E), and voltage magnitude difference between line and bus 1 voltage is above this setting.
CB1 CS1 VDiff 48 91 6.5
From 1 to 120 in steps of 0.5
[Courier Number (voltage)]
Check Synch Voltage differential setting decides that stage 1 System Check Synchronism logic for CB1 is blocked if Vdiff> is one of the
selected options in setting CB1 CS Volt. Blk (48 8E), and voltage magnitude difference between line and bus 1 voltage is above this setting.
CS1 Slip Ctrl 48 92 Enabled
Disabled
Enabled
[Indexed String]
Setting to enable or disable blocking of synchronism check stage 1 for reclosing CB by excessive frequency difference (slip) between line and
bus voltages
(refer to setting CS1 Slip Freq).
CB1 CS1 SlipCtrl 48 92 Enabled
Disabled
Enabled
[Indexed String]
Setting to enable or disable blocking of synchronism check stage 1 for reclosing CB1 by excessive frequency difference (slip) between line
and bus voltages
(refer to setting CB1 CS1 SlipFreq).
CS1 Slip Freq 48 93 0.05
From 0.005 to 2 in steps of 0.005
[Courier Number (frequency)]
If CS1 Slip Ctrl is enabled, synchronism check stage 1 is blocked for reclosing CB if measured frequency difference between line and bus
voltages is greater than this setting.
CB1 CS1 SlipFreq 48 93 0.05
From 0.005 to 2 in steps of 0.005
[Courier Number (frequency)]
If CB1 CS1 SlipCtrl is enabled, synchronism check stage 1 is blocked for reclosing CB1 if measured frequency difference between line and bus
voltages is greater than this setting.
CS2 Status 48 94 Disabled
Disabled
Enabled
[Indexed String]
Setting to enable or disable the stage 2 synchronism check elements for auto-reclosing and manual closing CB.
CB1 CS2 Status 48 94 Disabled
Disabled
Enabled
[Indexed String]
Setting to enable or disable the stage 2 synchronism check elements for auto-reclosing and manual closing CB1.
CS2 Angle 48 95 20
From 0 to 90 in steps of 1
[Courier Number (angle)]
Maximum permitted phase angle between Line and Bus 1 voltages for second stage synchronism check element to reclose CB
CB1 CS2 Angle 48 95 20
From 0 to 90 in steps of 1
[Courier Number (angle)]
Maximum permitted phase angle between Line and Bus 1 voltages for second stage synchronism check element to reclose CB1
CS2 VDiff 48 96 6.5
From 1 to 120 in steps of 0.5
[Courier Number (voltage)]
Check Synch Voltage differential setting decides that stage 2 System Check Synchronism logic is blocked if Vdiff> is one of the selected
options in setting CS Voltage Block (48 8E), and voltage magnitude difference between line and bus 1 voltage is above this setting.
CB1 CS2 VDiff 48 96 6.5
From 1 to 120 in steps of 0.5
[Courier Number (voltage)]
Check Synch Voltage differential setting decides that stage 2 System Check Synchronism logic for CB1 is blocked if Vdiff> is one of the
selected options in setting CB1 CS Volt.Blk (48 8E), and voltage magnitude difference between line and bus 1 voltage is above this setting.
CS2 Slip Ctrl 48 97 Enabled
Disabled
Enabled
[Indexed String]
Setting to enable or disable blocking of synchronism check stage 2 for reclosing CB by excessive frequency difference (slip) between line and