Freescale Semiconductor MPC5553, Reference Manual

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MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
16-14 Freescale Semiconductor
Each step must complete before the next step starts. The eSCI operates in half-duplex mode where the host
sends a byte of data, then waits for the echo back from the MCU before proceeding with the next byte.
Bytes sent from the host before the previous echo from the MCU is received, are ignored.
1. Download 64-bit password
The first 8 bytes of eSCI data the host computer sends must contain the 64-bit serial download
password. For each valid eSCI message received, the BAM transmits the same data on the eSCI_A
TXD_A signal.
The received 64-bit password is checked for validity. It is checked to ensure that none of the 4 x
16-bit halfwords are 0x0000 or 0xFFFF, which are considered illegal passwords. A password must
have at least one 0 and one 1 in each halfword lane to be considered legal.
The BAM program then checks the censorship status of the MCU by checking the DISNEX bit in
the SIU_CCR. If Nexus is disabled, the MCU is considered to be censored and the password is
compared with a password stored in the shadow row in internal flash memory.
If Nexus is enabled, the MCU is considered to be not censored or is booting from external flash
and the password is compared to the fixed value of 0xFEED_FACE_CAFE_BEEF.
If the password fails any of these validity tests, the MCU stops responding to all stimulus. To repeat
the boot operation the only options are to assert the RESET signal or wait for watchdog reset the
MCU. If the password is valid, the BAM refreshes the e200z6 watchdog timer and the next step in
the protocol can be performed.
2. Download start address and size of download
The next 8 bytes of eSCI data the host computer sends must contain a 32-bit address in internal
SRAM, indicating where the following data should be stored in the memory map of the MCU; and
a 32-bit number indicating how many bytes of data are to be received and stored in memory before
switching to execute the code just loaded. The start address is assumed to be on a word boundary
(4 bytes), therefore the least significant 2 bits of the address are ignored. For each valid eSCI
message received, the BAM transmits the same data on the eSCI_A TXD_A signal.
3. Download data
The host computer must then send a succession of eSCI messages, each containing raw binary data.
Each byte of data received is stored in the MCU’s memory, starting at the address specified in the
previous protocol step and incrementing through memory until the number of bytes of data
received and stored in memory matches the number specified in the previous protocol step. For
each valid eSCI message received, the BAM transmits the same data on the eSCI_A TXD_A
signal.
NOTE
Internal SRAM is protected by 64 bit wide error correction coding hardware
(ECC). This means that any write to uninitialized internal SRAM must be
64 bits wide, otherwise an ECC error occurs. Therefore the BAM buffers
downloaded data until 8 bytes have been received then does a single 64 bit
wide write. Only internal SRAM supports 64 bit writes therefore attempting
to download data to other RAM apart from internal SRAM causes errors. If
the start address of the downloaded data is not on an 8 byte boundary, the
BAM writes 0x00 to the memory locations from the preceding 8 byte
boundary to the start address (maximum 4 bytes). The BAM also writes
0x00 to all memory locations from the last byte of data downloaded to the
following 8 byte boundary (maximum 7 bytes).