56
56
56
56
(Symbol in xLogic)
The output of an AND with edge evaluation is only 1 if
all
all
all
all
inputs are 1 and
at
at
at
at least
least
least
least one
one
one
one
input
was 0 during the last cycle.
The output is set to 1 for the duration of one cycle and must be reset to 0 for the duration of the
next cycle before it can be set to 1 again.
A block input that is not used (x) is assigned: x = 1.
Timing diagram of an AND with edge evaluation
4
4
4
4.2.3
.2.3
.2.3
.2.3 NAND
NAND
NAND
NAND
(Symbol in xLogic)
The output of an NAND function is only 0 if
all
all
all
all
inputs are 1, i.e. when they are closed.
A block input that is not used (x) is assigned: x = 1.
Logic table of the NAND block:
Input
Input
Input
Input 1
1
1
1
Input
Input
Input
Input 2
2
2
2
Input
Input
Input
Input 3
3
3
3
Input
Input
Input
Input 4
4
4
4
Output
Output
Output
Output
0
0
0
0
1
0
0
0
1
1
0
0
1
0
1
0
0
1
1
1
0
1
0
0
1
0
1
0
1
1
0
1
1
0
1
0
1
1
1
1
1
0
0
0
1
Summary of Contents for xLogic
Page 1: ......
Page 2: ......
Page 102: ...100 100 100 100 B B B B Blocks Blocks Blocks Blocks...
Page 105: ...103 103 103 103 G G G G M M M M status status status status...
Page 106: ...104 104 104 104 H H H H AM AM AM AM value value value value...
Page 164: ...162 162 162 162 If the Memory Read block had been triggered the Q1 of ELC 12 CPU will be set 1...
Page 204: ...202 202 202 202 Step Step Step Step 6 6 6 6 Moving Moving Moving Moving...
Page 226: ...224 224 224 224...