70
70
70
70
Connection
Connection
Connection
Connection
Description
Description
Description
Description
Input
Trg
Trg
Trg
Trg
You trigger the on delay with a positive edge (0 to 1
transition) at input Trg (Trigger).
You trigger the off delay with a negative edge (1 to 0
transition).
Parameter
T
T
T
T
H
H
H
H
is the on delay time for the output (output signal transition
0 to 1).
T
T
T
T
L
L
L
L
is the off delay time for the output (output signal transition
1 to 0).
Retentivity
Retentivity
Retentivity
Retentivity
on = the status is retentive in memory.
Output
Q
Q
Q
Q
Q is switched on upon expiration of a configured time T
H
if Trg
is still set. It is switched off again upon expiration of the time
T
L
and if Trg has not been set again.
Parameter
Parameter
Parameter
Parameter
The on-delay time and off-delay time set in parameter
T
T
T
T
H and
T
T
T
T
L can be provided by the actual
value of another already-programmed function:
Analog comparator: Ax – Ay
Analog trigger: Ax
Analog amplifier: Ax
Analog multiplexer: AQ
Analog ramp: AQ
Analog math: AQ
PI controller:AQ
Data latching relay: AQ
Up/Down counter: Cnt
The value of
"TH","TL"
can be set/modified in parameter mode. For information about
how to modify, refer to chapter 5.2.2 please.
For information on the validity and accuracy of the time base, refer to 4.4.1
Timing
Timing
Timing
Timing diagram
diagram
diagram
diagram
Description
Description
Description
Description of
of
of
of the
the
the
the function
function
function
function
The time T
H
is triggered with a 0 to 1 transition at input Trg.
If the status at input Trg is 1 at least for the duration of the configured time T
H
, the output is set
to logical 1 upon expiration of this time (output is on delayed to the input signal).
Summary of Contents for xLogic
Page 1: ......
Page 2: ......
Page 102: ...100 100 100 100 B B B B Blocks Blocks Blocks Blocks...
Page 105: ...103 103 103 103 G G G G M M M M status status status status...
Page 106: ...104 104 104 104 H H H H AM AM AM AM value value value value...
Page 164: ...162 162 162 162 If the Memory Read block had been triggered the Q1 of ELC 12 CPU will be set 1...
Page 204: ...202 202 202 202 Step Step Step Step 6 6 6 6 Moving Moving Moving Moving...
Page 226: ...224 224 224 224...