C
URTISS
-W
RIGHT
P
RODUCT
O
VERVIEW
826448 V
ERSION
5 M
ARCH
2015
P
ROPRIETARY
1-19
Figure 1.9: CHAMP-AV8 Serial Port Detail
1000B
ASE
-T E
THERNET
Each processor on the CHAMP-AV8 is equipped with a 10/100/1000Base-T Gigabit Ethernet
interface. On air-cooled versions of the CHAMP-AV8, the Ethernet ports are available at the
front panel or backplane connector as a build-time option. For conduction-cooled versions,
Ethernet is available via the backplane only.
Mode
Select
Reg A
UART A0
A0_232_TX
A1_232_TX
A1_232_RX
SEL
EIA-232/422
xcvr
CF-FPGA
A0_232_RX
B0_232_TX
B1_232_TX
B1_232_RX
SEL
B0_232_RX
DIO16
DDIO
Enable
Reg A
EIA-232/422
xcvr
UART A1
TXD
RXD
Mode
Select
Reg B
UART B0
DIO17
DDIO
Enable
Reg B
UART B1
TXD
RXD
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