Software
164
Automation PC 3100 User's manual V 1.00
Translation of the original documentation
BIOS parameter
Setting options
Description
Disabled
URR
Enabled
Disables/Enables unsupported request reporting
Notification of unsupported requests.
Disabled
FER
Enabled
Disables/Enables fatal error reporting
Notification of fatal errors
5)
Disabled
NFER
Enabled
Disables/Enables non-fatal error reporting
Notification of non-fatal errors
5)
Disabled
CER
Enabled
Disable/Enable correctable error reporting
Notification of correctable errors
5)
Disabled
CTO
Enabled
Disables/Enables PCIe completion timer timeout
Disabled
SEFE
Enabled
Disables/Enables system error on fatal error
6)
Disabled
SENFE
Enabled
Disables/Enables system error on non-fatal error
6)
Disabled
SECE
Enabled
Disables/Enables system error on correctable error
6)
Disabled
PME SCI
Enabled
Disables/Enables system control interrupt on a power management event
Disabled
Hot plug
Enabled
Disables/Enables hot plugging
Disabled
Advanced error reporting
Enabled
Disables/Enables advanced error reporting
Auto
Gen1
Gen2
PCIe speed
Gen3
Selects the PCIe transfer rate [gigatransfers per second (GT/s)] automatically or manu-
ally
Gen1: Max. 2.5 GT/s
Gen2: Max. 5.0 GT/s
Gen3: Max. 8.0 GT/s
Disabled
Transmitter half swing
Enabled
Disables/Enables transmitter half-swing
Signals are transferred with a half-swing.
Detect timeout
INT
Default:
0
Defines the detect timeout [ms]
If no link is received from an enabled port after the detect timeout has expired, it is as-
sumed that no device is present there. The system can disable the port if necessary.
Range: 0 to 65535
Extra bus reserved
INT
Default:
0
Defines the extra bus reserved for bridges after this root bridge
Range: 0 to 7
Reserved memory
INT
Default:
10
Defines reserved memory [MB] for this bridge
Range: 0 to 20
Reserved I/O
INT
Default:
4
Defines the reserved I/O range for this bridge
Range: 4 to 20 kB
Resolution: 4 kB
PCH PCIe LTR configuration
Disabled
PCH PCIE1 LTR
Enabled
Disables/Enables PCIe latency reporting
Auto
Disabled
Snoop latency override
Manual
Disables the snoop latency override or selects manual or automatic mode
Snoop latency value
INT
Default:
60
Defines the snoop latency value
Range: 0 to 1023
1 ns
32 ns
1024 ns
32768 ns
1048576 ns
Snoop latency multiplier
33554432 ns
Defines the snoop latency multiplier value [ns]
Auto
Disabled
Non-snoop latency override
Manual
Disables the non-snoop latency override or selects manual or automatic mode
Non-snoop latency value
INT
Default:
60
Defines the non-snoop latency value
Range: 0 to 1023
1 ns
32 ns
1024 ns
32768 ns
1048576 ns
Non-snoop latency multiplier
33554432 ns
Defines the non-snoop latency multiplier value [ns]
Disabled
Force LTR override
Enabled
Disables/Enables force LTR override
Disabled
PCIE1 LTR lock
Enabled
Disables/Enables the PCIE1 LTR lock function
PCH PCIe CLKREQ#
Table 191: Advanced - PCH-IO configuration - PCI Express root port
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