AMD RS690M, Technical Reference Manual

Page: 9 / 120

41978 AMD RS690M Databook 3.06 © 2008 Advanced Micro Devices, Inc.
List of Tables-1 Proprietary
List of Tables
Table 1-1: RS690-Family ASIC Part Numbers ............................................................................................................................ 1-12
Table 1-2: Pin Type Codes ........................................................................................................................................................... 1-12
Table 1-3: Acronyms and Abbreviations ...................................................................................................................................... 1-13
Table 2-1: Supported DDR2 Components ...................................................................................................................................... 2-4
Table 2-2: DDR2 Memory Row and Column Addressing ............................................................................................................. 2-4
Table 2-3: LVDS 24-bit TFT Single Pixel per Clock (Single Channel) Signal Mapping .............................................................. 2-7
Table 2-4: LVDS 24-bit TFT Dual Pixel per Clock (Dual Channel) Signal Mapping ................................................................... 2-8
Table 2-5: Single-Link Signal Mapping for DVI/HDMI ............................................................................................................. 2-10
Table 2-6: Dual-Link Signal Mapping for DVI ............................................................................................................................ 2-11
Table 2-7: Support for HDMI Packet Type .................................................................................................................................. 2-12
Table 2-8: VGA DAC Characteristics .......................................................................................................................................... 2-13
Table 3-1: CPU HyperTransport™ Interface .................................................................................................................................. 3-8
Table 3-2: DDR2 Side-port Memory Interface (RS690T Only) ..................................................................................................... 3-8
Table 3-3: 1 x 16 Lane PCI Express Interface for External Graphics ............................................................................................ 3-9
Table 3-4: 1 x 4 Lane A-Link Express II Interface for Southbridge .............................................................................................. 3-9
Table 3-5: 4 x 1 Lane PCI Express® Interface for General Purpose External Devices ................................................................. 3-9
Table 3-6: PCI Express® Interface for Miscellaneous PCI Express® Signals .............................................................................. 3-9
Table 3-7: Clock Interface ............................................................................................................................................................ 3-10
Table 3-8: CRT and TV Interface ................................................................................................................................................. 3-10
Table 3-9: LVDS Interface ........................................................................................................................................................... 3-11
Table 3-10: TMDS Interface Multiplexed on the PCI Express® Graphics Interface ................................................................... 3-12
Table 3-11: Power Management Pins ........................................................................................................................................... 3-13
Table 3-12: Miscellaneous Pins .................................................................................................................................................... 3-13
Table 3-13: Power Pins ................................................................................................................................................................. 3-14
Table 3-14: Ground Pins ............................................................................................................................................................... 3-15
Table 3-15: RS690M Debug Port Signals .................................................................................................................................... 3-17
Table 3-16: RS690T Debug Port Signals ...................................................................................................................................... 3-17
Table 3-17: Strap Definitions for the RS690M ............................................................................................................................. 3-18
Table 3-18: Strap Definition for GPPSB_LINK_CONFIG .......................................................................................................... 3-19
Table 4-1: HTREFCLK Pad (66.66MHz) Timing Parameters ....................................................................................................... 4-1
Table 4-2: PCI Express® Differential Clock (GFX_CLK, SB_CLK) AC Characteristics ............................................................ 4-1
Table 4-3: Timing Requirements for the LVDS Interface .............................................................................................................. 4-2
Table 4-4: Timing Requirements for the OSCIN Pad .................................................................................................................... 4-2
Table 4-5: RS690M Power Rail Power Up Sequence Requirements ............................................................................................. 4-4
Table 4-6: LCD Power Up/Down Timing ...................................................................................................................................... 4-5
Table 5-1: Maximum and Minimum Ratings ................................................................................................................................. 5-1
Table 5-2: DC Characteristics for 3.3V TTL Signals ..................................................................................................................... 5-2
Table 5-3: DC Characteristics for 1.8V TTL Signals ..................................................................................................................... 5-2
Table 5-4: DC Characteristics for the HTREFCLK Pad (66.66MHz) ............................................................................................ 5-2
Table 5-5: DC Characteristics for the OSCIN Pad (14.3181818MHz) .......................................................................................... 5-2
Table 5-6: DC Characteristics for the DDR2 Interface .................................................................................................................. 5-3
Table 5-7: DC Characteristics for the TMDS Interface Multiplexed on the PCI Express® Gfx Lanes ......................................... 5-3
Table 5-8: Electrical Requirements for the LVDS Interface .......................................................................................................... 5-4
Table 5-9: RS690M Thermal Limits ............................................................................................................................................... 5-5
Table 5-10: RS690M/690T 465-Pin FCBGA Package Physical Dimensions ................................................................................ 5-7
Table 5-11: Recommended Board Solder Reflow Profile - RoHS/Lead-Free Solder .................................................................. 5-10
Table 6-1: ACPI States Supported by the RS690M ........................................................................................................................ 6-1
Table 6-2: ACPI Signal Definitions ................................................................................................................................................ 6-1
Table 6-3: Standard PCI Configuration Space Header Type 0 ....................................................................................................... 6-2