41978 AMD RS690M Databook 3.06
© 2008 Advanced Micro Devices, Inc.
B-2
Proprietary
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Updated Section 5.3.3.1, “Stencil Opening Size for Solderball Pads on PCB”: Changed stencil opening
recommendations.
Rev 0.4 (Aug 2006)
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Revised Table 3-23, “Power Pins”: Corrected ball references for VDD_PLL pins; corrected voltage level for
LVDDR33.
Rev 0.5 (Sep 2006)
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Revised Section 1.5.7, “3D Acceleration Features”: Corrected maximum resolution supported to 2048x1536@32bpp
for a maximum pixel clock speed of 400MHz. .
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Revised Section 1.5.11, “DVI/HDMI (Not applicable to the RS690MC)”: Updated HDMI basic audio support
statement.
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Updated Table 3-11, “Power Management Pins”: Corrected I/O type for ALLOW_LDTSTOP to “OD.”
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Updated Table 3-12, “Miscellaneous Pins”: Corrected I/O type for TMDS_HPD to “I/O.”
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Revised Section 4.7, “Power Rail Power Up Sequence”: Removed 1.2V PCI-E and HT rails from the sequence.
Rev 0.6 (Oct 2006)
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Updated Table 5-4, “DC Characteristics for the HTREFCLK Pad (66.66MHz)”: Revised VIH minimum to 1.4V.
Rev 3.00 (Jan 2007)
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Changed general document styles and legal statements to reflect AMD identity.
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Raised revision number to 3.00, following the AMD scheme.
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Revised H.264 support statement and moved it to Section 1.3.
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Revised Section 1.5.4, “PCI Express® Interface”: Added possibility for RS690T to support a x8 general purpose
device on the PCI-E graphics interface.
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Added Section 1.5.3, “ATI HyperMemory™ Technology.”
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Updated Section 1.5.9, “Multiple Display Features”: Corrected TV modes supported.
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Added Section 1.7.2, “Branding Diagrams for ASIC Revision A12 and After.”
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Moved “LVDS Spread Spectrum” section from Section 2.4.1 to Section 2.3.2.
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Updated Table 3-7, “Clock Interface”: revised description of TVCLKIN, clarifying its function on the RS690T.
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Updated Table 5-2, “DC Characteristics for 3.3V TTL Signals”: Corrected IOL and IOH values for DACSCL and
I2C_CLK.
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Updated Section 5.3.2, “Pressure Specification”: Revised statement on the maximum pressure to be applied for
securing the thermal management device.
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Updated Table 5-8, “Electrical Requirements for the LVDS Interface” and Figure 5-2, “DC Characteristics of the
LVDS Interface”: Corrected VOD label to VSW (Singe-ended Output Swing).
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Updated Table 3-23, “Power Pins” and Table 5-1, “Maximum and Minimum Ratings”: Clarified description for
VDD_18, which also powers the DFT_GPIOs.
Rev 3.01 (Feb 2007)
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Updated Section 1.5.11, “DVI/HDMI (Not applicable to the RS690MC)”: Qualified that HDCP support is for
single-link transmission only; revised audio support statement.
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Updated Table 3-3, “1 x 16 Lane PCI Express Interface for External Graphics”: Corrected pin type of
GFX_REFCLKP/N to input only.
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Updated Table 3-4, “1 x 4 Lane A-Link Express II Interface for Southbridge”: Corrected pin type of SB_CLKP/N to
input only.
