Agilent Technologies 34970A, Service Manual, Page: 124 / 273

The custom ASIC, U209, provides:
• Memory Address mapping – The main controller multiplexes
address and data on the same bus. U209 latches the address and
drives a separate memory address bus (MA(19:1)). U209 allows the
main controller to access a much larger memory space than its
16-bit address bus would allow. It also partitions memory into
separate data and instruction segments and a “mappable” segment
that can be used for either data or instructions.
•
Communications – U209 provides three serial communication
ports. A 187.5 kbit/second, 9 data bit, UART for communicating
with the isolated backplane (FLT_BPDO and FLT_BPDI_N). A
duplicate, 9-bit UART to communicate with the front panel (FPDO
and FPDI). And a simple, 1.5 Mbit/second, clocked shift-register to
control the configuration registers on the DMM assembly
(CFG_SCK, CFG_DO, and CFG_DI).
•
Real Time Clock – U209 provides time of day and date, a periodic
interrupt, and a squarewave generator. The date is based on a 100
year calendar (it accurately tracks leap years until its two digit
year counter rolls over). U209 uses the battery-5V_NV
supply.
• DMM support – U209 provides conversion logic for the
analog-to-digital converter and a counter for both the ADC and the
frequency measurement features of the DMM. When used for the
ADC, the COMP input functions both as a clocked comparator and
the slope counter input. When used for frequency measurement,
FREQIN is the input to the counter. In both cases, the 8-bit
counter produces the lower bits of a 24-bit counter. The counter
overflow signal, CNT, is counted by U205 to produce the upper
16-bits of the count. The SYNC signal produced by U205, is used
to latch the count.
Device U201 is a 512 byte, ferroelectric RAM that is accessed via a
serial interface. This device only contains data relevant to the A1
assembly. This data is combined with data retrieved from A4U450 to
completely calibrate the internal DMM. The two devices, although on
different assemblies, share the same I/O signals, CALSCK and
CALDAT, that allow them to be read (and written) by U205.
Chapter 5 Theory of Operation
Floating Logic
122