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voltage difference between bus and line is acceptable, the measured values are also
compared with the set values for acceptable frequency
FreqDiffMax
and
FreqDiffMin
,
rate of change of frequency
FreqRateChange
and phase angle, which has to be smaller
than the internally preset value of 15 degrees.
Measured frequencies between the settings for the maximum and minimum frequency
will initiate the measuring and the evaluation of the angle change to allow operation to be
sent in the right moment including the set
tBreaker
time. There is a phase angle release
internally to block any incorrect closing pulses. At operation the SYNOK output will be
activated with a pulse
tClosePulse
and the function reset. The function will also reset if the
syncronizing conditions are not fulfilled within the set
tMaxSynch
time. This prevents that
the function is, by mistake, maintained in operation for a long time, waiting for conditions
to be fulfilled.
The inputs BLOCK and BLKSYNCH are available for total block of the complete
SESRSYN function and block of the Synchronizing function respectively. TSTSYNCH
will allow testing of the function where the fulfilled conditions are connected to a separate
output.
OR
AND
S
R
Voltage difference between
V-Bus and V-Line < 0.10 p.u
Bus voltage > 80% of
GblBaseSelBus
Line voltage > 80% of
GblBaseSelLine
FreqDiffMax
FreqDiffMin
FreqRateChange
AND
AND
AND
AND
AND
OR
AND
OR
SYN1
STARTSYN
BLKSYNCH
SYNPROGR
SYNOK
SYNFAIL
TSTSYNOK
ANSI08000020-3-en.vsd
0
0.05-tClosePulse
0
50 ms
0
0-tMaxSynch
OPERATION SYNCH=ON
TEST MODE=ON
fBus&fLine ± 5 Hz
PhaseDiff < 15 deg
PhaseDiff=closing angle
FreqDiff
tBreaker
Close pulse
in advace
ANSI08000020 V3 EN
Figure 98:
Simplified logic diagram for the synchronizing function
Section 10
1MRK 511 287-UUS A
Control
230
Technical manual
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