TOBY-L4 series - System Integration Manual
UBX-16024839 - R04
Design-in
Page 92 of 143
Additional considerations
If a 3.0 V external Processor / Device is used, the voltage scaling from any 3.0 V output of the external Processor
/ Device to the corresponding 1.8 V input of the module can be implemented as an alternative low-cost solution,
by means of an appropriate voltage divider. Consider the value of the pull-up integrated at the input of the
module for the correct selection of the voltage divider resistance values and mind that any DTE signal connected
to the module must be tri-stated or set low when the module is in power-down mode and during the module
power-on sequence (at least until the activation of the
V_INT
supply output of the module), to avoid latch-up of
circuits and allow a clean boot of the module (see the remark below).
Moreover, the voltage scaling from any 1.8 V output of the cellular module to the corresponding 3.0 V input of
the external Processor / Device can be implemented by means of an appropriate low-cost non-inverting buffer
with open drain output. The non-inverting buffer should be supplied by the
V_INT
supply output of the cellular
module. Consider the value of the pull-up integrated at each input of the external Processor / Device (if any) and
the baud rate required by the application for the appropriate selection of the resistance value for the external
pull-up biased by the application processor supply rail.
Do not apply voltage to any UART interfaces pin before the switch-on of the UART supply source (
V_INT
),
to avoid latch-up of circuits and allow a clean boot of the module.
The ESD sensitivity rating of UART interfaces pins is 1 kV (Human Body Model according to JESD22-A114).
A higher protection level could be required if the lines are externally accessible and it can be achieved by
mounting an ESD protection (e.g. EPCOS CA05P4S14THSG varistor array) close to the accessible points.
If the UART interfaces pins are not used, they can be left unconnected on the application board, but it is
recommended to provide accessible test points directly connected to the UART0
TXD
and
RXD
pins for
diagnostic purposes.
2.6.2.2
Guidelines for UART layout design
The UART serial interface requires the same considerations regarding electro-magnetic interference as any other
digital interface. Keep the traces short and avoid coupling with RF line or sensitive analog inputs, since the
signals can cause the radiation of some harmonics of the digital data frequency.
