TOBY-L4 series - System Integration Manual
UBX-16024839 - R04
System description
Page 11 of 143
Baseband and power management section
The Baseband and Power Management section is composed of the following main elements:
A mixed signal ASIC, which integrates
o
Microprocessor for control functions
o
DSP core for cellular Layer 1 and digital processing of Rx and Tx signal paths
o
Memory interface controller
o
Dedicated peripheral blocks for control of the USB, SIM and generic digital interfaces
o
Interfaces to the RF transceiver ASIC
Memory system, which includes NAND flash and LPDDR2 RAM
Voltage regulators to derive all the subsystem supply voltages from the module supply input
VCC
Voltage source for external use:
V_INT
Hardware power on
Hardware reset
Low power idle mode support
32.768 kHz crystal oscillator to provide the clock reference in the low power idle mode, which can be set by
enabling the power saving configuration.