Tektronix 2445, Инструкция по эксплуатации

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Theory of Operation—2445 Service
CH 2 D ELAY OFFSET. The VS2 (vertical select, chan­
nel 2) output applied to analog switch U860B at pin 10
routes a calibrated offset voltage from sample-and-hold
buffer U165D to both sweep hybrids when the Channel 2
vertical signal is being displayed. The offset voltage is used
to eliminate the apparent propagation delay between the
Channel 2 and the Channel 1 (or CH 2 and either one o f the
other channels). A step in the calibration procedure allows
use of the front-panel Channel 2 Delay Offset feature to be
either enabled or disabled. When enabled, the Channel 2
offset may be adjusted up to ±500 ps (with respect to
Channel 1) using the A control.
CALIBRATOR TIMING. The Calibrator tim ing signal
(CT) from the Display Sequencer is generated by an
internal counter. The counter divides the 5-MHz clock
input at pin TC (timing clock) by a value that is a function
of sweep speed. The resulting square-wave output signal
drives the Calibrator circuit. For ease o f sweep rate
verification, the Calibrator signal provides a display o f five
complete cycles on the crt at sweep speeds from 100 ms
per division to 0.1 jus per division. Below 100 ms per
division, the Calibrator output frequency remains at 5 Hz;
and above 0.1 jus per division, the Calibrator frequency
remains at 5 MHz.
When chopping between vertical channels, the Display
Sequencer adds a 200-ns skew at the end of some sweeps
to desynchronize the chop frequency from the sweep speed
(to prevent the sweep from locking onto the chop fre­
quency). Due to this, the Calibrator signal has an irregular
pulse repetition characteristic between sweeps. This w ill not
be apparent when observing the Calibrator signal on the crt
of the 2445 since the skew is synchronized to the sweep,
but may be observed when the Calibrator output signal is
used w ith other instrumentation. The skew can be elim i­
nated by setting the 2445 to SGL SEQ Mode (to shut o ff
the sweeps).
A/B Trigger
The A/B Trigger hybrid (U500) and associated circuitry
select the triggering signal source fo r each horizontal sweep
as directed by the Display Sequencer. When the proper
triggering criteria to initiate a sweep are detected, a trigger­
ing gate signal is produced to start the selected sweep.
Control data from the processor defining trigger mode,
coupling, and slope parameters fo r each trigger is clocked
into two storage registers internal to U500 by the A TRIG
CLK signal on p in 23 (CCA) and the B TRIG CLK signal
on pin 47 (CCB). The Display Sequencer selects the A
trigger source w ith the SR0A, SRI A, and SR2A signal
lines; the B trigger source is selected using the SR0B, SR IB ,
and SR2B signal lines. Table 3-2 illustrates trigger source
selection.
Table 3-2
Trigger Source Selection
Select Inputs
Trigger Source
SR2A(B)
SRI A(B) SR0A(B)
H H
L CH 1
H
L H CH 2
H L L ADD
L H L CH 3
L
L
H
CH 4
H H H LINE (or BWLBa)
aDuring calibration routines from the Diagnostic Monitor.
To initiate the A Sweep, the trigger hybrid compares
the selected signal to the analog trigger level input at
pin 13, T L A (trigger level A). B trigger signals are compared
to the TLG (trigger level B) signal at pin 37 when triggered
B Sweeps are required. When the proper trigger signal is
detected, U500 outputs a trigger gate (TGA or TGB) to
the appropriate sweep circuit to initiate that sweep.
When an A Sweep is initiated, the trigger-status line
(TSA) (trigger status A, U500 pin 20) goes LO to signal
the Display sequencer that a trigger has occurred. Until
the sweep is completed, the TGA signal on pin 18 (or TGB
signal on pin 42 for B Sweeps) remains LO. A fter the A
Sweep is completed, the A Sweep Gate (SGA) from A
Sweep hybrid U700 (via U980A) w ill go HI, causing the
Display Sequencer to set its THO (trigger holdoff) line
(pin 13) HI. This resets the sweep hybrid and the trigger
hybrid in preparation for the next trigger event.
The B Trigger H oldoff input (THOB, U500 pin 39) is
held HI (keeping the B Trigger reset) until the A Sweep
Delay Gate (DG, U700 pin 41) goes LO (see the following
A Sweep description). When DG goes LO, the B Trigger
portion o f U500 is enabled. The B Sweep Trigger functions
in a manner similar to that o f the A Sweep Trigger just
described.
A Sweep
When properly triggered, the A Sweep circuit generates
linear sweep ramps of selectable slopes. When amplified,
these ramp signals horizontally sweep the crt beam across
the face of the crt. The A Sweep circuitry consists o f U700,
3-21