Tektronix 2445, Инструкция по эксплуатации

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Theory of Operation—2445 Service
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Vertical Display Selection
Select Inputs
Vertical
Display
VS1 VS2 VS3
VS4
L H H H CH 1
H
L H H CH 2
L L H
H ADD
H
H L L CH 3
H H
H L CH 4
H
H H H Readout (Y)
READOUT SWITCH/AMPLIFIER. Transistors U485A,
U485B, U485C, U485D, and U475C, along w ith their
associated components, make up an analog switch circuit
that routes either the readout vertical signal at the base of
U485A or the ground reference at the base of U485C to
the output at the emitter of U475C. The signal selected
depends on the complementary voltages applied to the
emitter junctions of the two emitter-coupled transistor
pairs, U485A and B and U485C and D. The selection
voltages are developed by voltage-divider networks on the
complementary logic outputs of U975C and U975A.
When readout information is to be displayed, the hori­
zontal select inputs to U980B and U980C go HI and the
output o f NAND-gate U975C goes LO. The LO applied to
the divider network of R498, R484, and R471 pulls the
anode o f CR484 low enough to reverse bias it. This forward
biases the emitter-coupled pair U485A and B via R483.
NAND-gate U975A inverts the LO and applies a HI to the
junction of R497 and R485. The HI forward biases CR485,
and the emitters of U485C and D are pulled to a level in
excess of +2 V, reverse biasing the transistor pair. With
U485C and D reverse biased, the ground reference level at
the base o f U485C is isolated from the output, while the
readout vertical information is allowed to passthrough the
forward-biased transistor pair.
When readout information is not being displayed, a HI
is present at the output of NAND-gate U975C. The HI
forward biases CR484 and, when inverted by U975A,
reverse biases CR485. With the biasing conditions reversed,
the transistor pair of U485C and D becomes forward biased
and U485A and B become reverse biased. The ground
reference level present at the base of U485C is coupled to
the output, while the readout vertical signal is isolated.
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the ground reference level) is applied to the CH5+ input of
Channel Switch U400 via R495 and R412. The inverting
amplifier circuit composed o f U475A, U475B, U475D, and
associated components inverts the readout vertical signal
fo r application to the CH5— input. The amplifier is an
inverting unity-gain configuration w ith transistors U475A
and U475B connected as an emitter-coupled pair. The base
of U475A is referenced to ground through R482. The base
o f U475B is pulled to the same level by the negative feed­
back from emitter-follower U475D through R478. The
noninverted signal applied is to the base of U475B through
R492 and w ill attempt to increase or decrease the current
to the base of U475B, depending on the amplitude and
polarity of the signal. However, the negative feedback
from the collector of U475B (via U475D and R478) w ill
hold the base o f U475B at the ground reference level.
The feedback current through R478 develops a voltage
drop across R478 that is equal in amplitude but opposite in
polarity to the noninverted vertical readout signal. The
inverted readout signal is applied to the Channel Switch on
pin 2 (CH5—) via R476 and R402.
Resistor R416 (connected to pin 16) sets the high-
frequency response of the Channel Switch hybrid.
Delay Line
Vertical deflection signals from the Vertical Channel
Switch are delayed approximately 78 ns by Delay Line
DL100. This delay allows the Sweep and Z-Axis circuits to
turn on before the triggering event begins vertical deflection
of the crt beam, thereby permitting the operator to view
the triggering event. The pi-filter network, composed of
inductors and capacitors built into the circuit board, and
adjustments R403 and C404 correct phase-distortion
introduced by the delay line and set the overall higher
frequency response of the vertical deflection system.
Vertical Output Amplifier
Vertical O utput Am plifier U600 is a hybrid device that
provides the final amplification of the selected vertical
signal, raising it to the level required to drive the crt deflec­
tion plates. The vertical signal from the Deiay Line is
applied to pins 10 and 3 of U600. The RL network con­
nected between pins 8 and 5 (COMPA and COMPB) of
U600 compensates the signal for the skin-effect losses
associated w ith the delay line.
A m plifier gain and vertical centering are adjusted by
R638 and R639 respectively, primarily to match the
amplifier hybrid to the crt installed in the instrument.
An intensity-dependent correction current is sinked away
from the vertical centering input at pin 39 by the Dynamic
Centering circuit. The correction signal holds the vertical
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