
Theory of Operation—2445 Service
Out-of-phase input signals to comparator U1062Ccome
from tw o resistive voltage dividers placed in either leg of
one secondary winding of T1050. The comparator detects
the phase changes (crossover points) of the secondary
current caused as Q1050 switches on and off. Every
complete on-off cycle of Q1050 produces a positive clock
at pin 14 of U1062C that toggles flip-flop U1064B. The
toggling alternately turns switching transistors Q1060 and
Q1070 on, each w ith an approximate 50% duty cycle.
Comparators U1062A and U1062B, at the Q and Q
output o f the flip-flop, detect the precise crossing point of
the toggling drive signals and ensure that only one switching
transistor w ill be on at any one time. These mutuaily-
exclusive drive signals are buffered by inverters U1066A
and U1066B and applied to switching transistors Q1060
and Q1070 to alternately turn them on and o ff at one-half
the switching rate o f Q1050. By alternately switching
opposite ends o f the primary winding to ground, the
current flowing through switching transistor Q1050 w ill
flow alternately in each half o f the primary winding. This
produces ac voltages at the secondary windings that are
rectifiied, providing the various unregulated dc supply
voltages.
Current Limit
The Current Lim it circuit, composed of transistor
Q1040 and the associated components, limits the maximum
current flow in the output transformer to about 1 ampere.
Resistor R1040 (connected to the Preregulator Control
1C +15-V supply) forward biases germanium diode CR1040
and applies approximately +0.3 V across the base-to-emitter
junction of Q1040. Current flowing to the output trans
former develops a voltage drop across R1050 that adds to
the bias developed by CR1040. As the current to the
transformer increases, the voltage drop across R1050 also
increases until, at around 1 A, the combined voltage drop
across R1050 and CR1040 forward biases transistor Q1040.
The base o f Q1022 is pulled negative through R1042, and
the +15-V supply for the Preregulator 1C turns o ff (see
Preregulator Control discription). The power supply w ill
try to restart itself; but, as long as the excessive-current
condition persists, the current-lim it circuit w ill keep
shutting the supply down, protecting the instrument.
Rectifiers
The Rectifiers convert the alternating current from the
secondary windings of the inverter output transformer to
the various dc supply voltages required by the instrument.
Rectification is done by conventional diode rectifier
circuits, and filtering is done by conventional LC networks.
The +87-V unregulated supply is produced by a voltage-
doubSer circuit. The positive plate of Cl 130 at the anode of
CR1132 is referenced at approximately +45 V through
diode CR1131 (to the +42-V unregulated supply). As the
positive half cycle from the 42-V secondary winding
(actually about +45 V peak) is applied to the negative plate
of Cl 130, the positive plate is elevated to a peak value of
approximately +90 V. Diode CR1132 becomes forward
biased and storage capacitor Cl 132 is charged to about
+90 V. Following cycles replenish the charge drawn o ff by
the loads on the +87-V supply line.
Line Signal
A sample of the ac line voltage is coupled to the Trigger
circuit by transformer T1229 and provides the LINE TRIG
signal to the Trigger hybrid. Transformer current is limited
to a safe value by resistors R1014 and R1015 placed in
series w ith the primary winding leads. The transformer's
output characteristics are matched to the input of the
Trigger circuit hybrid by R1208 and C l208.
Line Up Signal
The circuit composed of Q1029, opto-isolator U1029,
and their associated components, detects when power has
been applied to the instrument and the Preregulator
Control power supply is functioning properly. When the
rectified line voltage reaches proper operating voltage, the
voltage divider composed of R1027 and R1028 forward
biases Q1029. As soon as the Preregulator Control power
supply turns on, current flows through R1029, Q1029,
and the opto-isolator LED. The illuminated LED saturates
transistor U1029 and the LINE UP signal to the Power-Up
Delay circuit (diagram 1) is pulled HI, indicating that the
Preregulator Control circuit should now be functioning
properly.
POWER DOWN. When instrument power is turned off,
the voltage across the primary storage capacitors (Cl 021
and C l022) begins to fall as the capacitors discharge. As
the voltage drops, the bias current through R1027 to the
base o f Q1029 also drops until the bias voltage across
R1028 reaches a point about 2 V above the average trans
former drive level at pin 2 o f U1029. A t this point, Q1029
turns o ff, and the LINE UP signal to the Power-up Delay
circuit goes LO. This LO signals the Microprocessor that it
should start its power down routine.
The Line Up circuit tells the Microprocessor that the
primary capacitors have started discharging while there is
still a stored charge (set by R1027 and R1028) about 40%
in excess o f that required to keep the power supply voltages
in regulation. This allows the Microprocessor to complete
the power-down sequence before the supplies drop below
their normal operating levels. Further information about
the power-down sequence is given in the Microprocessor
Reset Control description.
3
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