Tektronix 2445, Инструкция по эксплуатации

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Theory of Operation—2445 Service
Most of the activities of the 2445 are directed by a
Microprocessor, The Microprocessor, under firmware
control (firmware is the programmed instructions contained
in read-only memory that tells the processor how to
operate), monitors instrument functions and sets up the
operating modes according to the instructions received.
Various types of data to and from the Microprocessor
(program instructions, constants, control data, etc.) are
transferred over a group of eight bidirectional signal lines
called the Data Bus. The Data Bus is dedicated solely to
Microprocessor-related data transfer.
Another group of signal lines, called the Address Bus,
are responsible for selecting or "addressing" the memory
location or device that the Microprocessor wants to com­
municate with. Typically, depending on the instruction
being executed, the processor places an address on the
Address Bus to identify the location the Microprocessor
must communicate with. This address, along w ith some
enabling logic, opens up an appropriate data path via the
Data Bus; and data is then either read from or w ritten to
that location by the processor.
While executing the control program, the Microprocessor
retrieves previously stored calibration constants and front-
panel settings and, as necessary, places program-generated
data in temporary storage fo r later use. The EAROM
(electrically-alterable read-only memory) and RAM
(random-access memory) provide these storage functions
respectively.
When power is applied to the 2445, a brief initialization
sequence is performed, and then the processor begins
scanning the front-panel controls. The switch settings
detected and the retrieved front-panel data from the
EAROM causes the processor to set various control registers
and control voltages w ithin the instrument that define the
operating mode of the instrument. These register settings
and voltage levels control the vertical channel selection
and deflection factors, the sweep rate, the triggering
parameters, the readout activity, and sequencing of the
display. Loading the control data into the various registers
throughout the instrument is done using a common serial
data line (CD). Individual control clock signals (CC) deter­
mine which register is loaded from the common data line.
Coordination o f the vertical, horizontal, and Z-Axis
(intensity) components o f the display most be done in real
time. Due to the speed o f these display changes and the
precise tim ing relationships that must be maintained
between display events, direct sequencing of the display is
beyond the capabilities of the processor. Instead, control
data from the processor is sent to the Display Sequencer
(a specialized integrated circuit) which responds by setting
up the various signals that control the stages handling the
real-time display signals. The controlled stages are stepped
through a predefined sequence that is determined by the
control data. Typically, as the sequence is being executed,
the Display Sequencer w ill be changing vertical signal
sources, Z-Axis intensity levels, triggering sources, and
horizontal sweep signal sources. The specific activities
being carried out by the Display Sequencer depend on
the display mode called for by the control data.
Vertical deflection for crt displays comes from one or
more of the four front-panel vertical inputs and, when
displaying readout information, from the Readout circuitry.
Signals applied to the front-panel Channel 1 and Channel 2
inputs are connected to their respective Preamplifiers
via processor-controlled Attenuator networks. Control data
from the Microprocessor defining the attenuation factor
selected for each channel is serially loaded into the
Auxiliary Control Register and then strobed into the
Attenuator Mag-Latch Relays in parallel. The relay switches
of each Attenuator network are either opened or closed,
depending on the data supplied to the Mag-Latch Relay
Drivers. The relays are magnetically latched and remain as
set until new control data is strobed in. The Auxiliary
Control Register is therefore available, and different mode
data is clocked into the register to set up the operating
mode of other portions o f the instrument.
Attenuated Channel 1 and Channel 2 input signals are
amplified by their respective Preamplifiers. The gain factor
fo r the Channel 1 and Channel 2 Preamplifiers is settable
by control data from the processor. The Channel 3 and
Channel 4 input signals are amplified by their respective
Preamplifiers by either of a choice o f tw o gain factors set
by control bits from the Auxiliary Control Register. A ll
four of these preamplified signals are applied to the Vertical
Channel Switch where they are selected by the Display
Sequencer for display when required.
Each of the vertical signals is also applied to the A and
B Trigger circuitry via trigger pickoff outputs from the
Preamplifier stages. Any one of the signals may be selected
as the trigger SOURCE for either the A or the B Trigger
circuitry as directed by the Display Sequencer. The line
trigger signal provides an added trigger source fo r A Sweeps
only. Control data from the Microprocessor is w ritten to
the Trigger circuitry to define the triggering LEVEL,
SLOPE, and COUPLING criteria. When the selected trigger
signal meets these requirements, a sweep can be initiated.
The Trigger circuit initiates both the A Sweep and the B
Sweep as required by the display mode selected.
In the case of A Sweeps, the LO state o f the trigger
holdoff (THO) signal from the Display Sequencer enables
the A Sweep circuit and the next A Trigger signal initiates