DocID018909 Rev 11
429/1731
RM0090
Analog-to-digital converter (ADC)
434
13.13.16 ADC
common control register (ADC_CCR)
Address offset: 0x04 (this offset address is relative to ADC1 base a 0x300)
Reset value: 0x0000 0000
Bit 19
JSTRT3:
Injected channel Start flag of ADC3
This bit is a copy of the JSTRT bit in the ADC3_SR register.
Bit 18
JEOC3:
Injected channel end of conversion of ADC3
This bit is a copy of the JEOC bit in the ADC3_SR register.
Bit 17
EOC3:
End of conversion of ADC3
This bit is a copy of the EOC bit in the ADC3_SR register.
Bit 16
AWD3:
Analog watchdog flag of ADC3
This bit is a copy of the AWD bit in the ADC3_SR register.
Bits 15:14 Reserved, must be kept at reset value.
Bit 13
OVR2:
Overrun flag of ADC2
This bit is a copy of the OVR bit in the ADC2_SR register.
Bit 12
STRT2:
Regular channel Start flag of ADC2
This bit is a copy of the STRT bit in the ADC2_SR register.
Bit 11
JSTRT2:
Injected channel Start flag of ADC2
This bit is a copy of the JSTRT bit in the ADC2_SR register.
Bit 10
JEOC2:
Injected channel end of conversion of ADC2
This bit is a copy of the JEOC bit in the ADC2_SR register.
Bit 9
EOC2:
End of conversion of ADC2
This bit is a copy of the EOC bit in the ADC2_SR register.
Bit 8
AWD2:
Analog watchdog flag of ADC2
This bit is a copy of the AWD bit in the ADC2_SR register.
Bits 7:6 Reserved, must be kept at reset value.
Bit 5
OVR1:
Overrun flag of ADC1
This bit is a copy of the OVR bit in the ADC1_SR register.
Bit 4
STRT1:
Regular channel Start flag of ADC1
This bit is a copy of the STRT bit in the ADC1_SR register.
Bit 3
JSTRT1:
Injected channel Start flag of ADC1
This bit is a copy of the JSTRT bit in the ADC1_SR register.
Bit 2
JEOC1:
Injected channel end of conversion of ADC1
This bit is a copy of the JEOC bit in the ADC1_SR register.
Bit 1
EOC1:
End of conversion of ADC1
This bit is a copy of the EOC bit in the ADC1_SR register.
Bit 0
AWD1:
Analog watchdog flag of ADC1
This bit is a copy of the AWD bit in the ADC1_SR register.