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S
ETTINGS
S
HEET
Page
5
OF
10
FOR THE
SEL-321/321-1 R
ELAY
Date
(5 A N
OMINAL
R
ELAY
)
Date Code 20011026
Voltage Element Settings
Enable Voltage Elements: (Y/N)
EVOLT
=
_________
Zero-Sequence Over-Voltage: (0 - 150 V sec., 3V0)
59N
=
_________
Bus Phase Under-Voltage: (0 - 100 V sec.)
27L
=
_________
Bus Phase Over-Voltage: (0 - 100 V sec.)
59L
=
_________
Positive-Sequence Bus Over-Voltage: (0 - 150 V sec., V1)
59PB
=
_________
Positive-Sequence Bus Over-Voltage Time Delay (TDPU): (0 - 8000 cyc)
59PBD
=
_________
Positive-Sequence Remote Bus Over-Voltage: (0 - 150 V sec., V1)
59PR
=
_________
Current Comp. Remote Over-Voltage Time Delay (TDPU): (0 - 8000 cyc)
59PRD
=
_________
Current Compensated Remote Overvoltage Adjustment: (0 - 2 unitless)
a1
=
_________
Time Step Backup Time Delay Settings
Zone 2 Phase Long Time Delay (TDPU): (0 - 2000 cycles)
Z2PD
=
_________
Zone 3 Phase Time Delay (TDPU): (0 - 2000 cycles)
Z3PD
=
_________
Zone 4 Phase Time Delay (TDPU): (0 - 2000 cycles)
Z4PD
=
_________
Zone 2 Ground Long Time Delay (TDPU): (0 - 2000 cycles)
Z2GD
=
_________
Zone 3 Ground Time Delay (TDPU): (0 - 2000 cycles)
Z3GD
=
_________
Zone 4 Ground Time Delay (TDPU): (0 - 2000 cycles)
Z4GD
=
_________
Level 1 Residual Time Delay (TDPU): (0 - 2000 cycles)
67NL1D =
_________
Level 2 Residual Long Time Delay (TDPU): (0 - 2000 cycles)
67NL2D =
_________
Level 3 Residual Time Delay (TDPU): (0 - 2000 cycles)
67NL3D =
_________
Level 4 Residual Time Delay (TDPU): (0 - 2000 cycles)
67NL4D =
_________
Level 1 Negative-Sequence Time Delay (TDPU): (0 - 2000 cycles)
67QL1D =
_________
Level 2 Negative-Sequence Long Time Delay (TDPU): (0 - 2000 cycles)
67QL2D =
_________
Level 3 Negative-Sequence Time Delay (TDPU): (0 - 2000 cycles)
67QL3D =
_________
Level 4 Negative-Sequence Time Delay (TDPU): (0 - 2000 cycles)
67QL4D =
_________
Permissive Overreaching Scheme Settings
Enable Permissive Overreaching Transfer Trip Scheme: (Y/N)
EPOTT
=
_________
Zone 3 Reverse Block Time Delay (TDDO): (0 - 2000 cycles)
Z3RBD
=
_________
Echo Block Time Delay (TDDO): (0 - 2000 cycles)
EBLKD
=
_________
Echo Time Delay Pickup Time Delay (TDPU): (0 - 2000 cycles)
ETDPU
=
_________
Echo Duration Time Delay (TDDO): (0 - 2000 cycles)
EDURD
=
_________
Weak-Infeed Enable: (Y/N)
EWFC
=
_________
Directional Comparison Unblocking Scheme Settings
Enable DCUB: (Y/N)
EDCUB
=
_________
Guard Present Security Time Delay (TDDO): (0 - 2000 cycles)
GARD1D =
_________
DCUB Disabling Time Delay (TDPU): (0.25 - 2000 cycles)
UBDURD =
_________
DCUB Duration Time Delay (TDPU): (0 - 2000 cycles)
UBEND
=
_________
Содержание SEL-321
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Страница 78: ...2 54 Specifications Date Code 20011026 SEL 321 321 1 Instruction Manual Figure 2 4 Logic Symbol Legend ...
Страница 87: ...Date Code 20011026 Specifications 2 63 SEL 321 321 1 Instruction Manual Figure 2 21 Load Encroachment Logic ...
Страница 94: ...2 70 Specifications Date Code 20011026 SEL 321 321 1 Instruction Manual Figure 2 29 Voltage Element Logic ...
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Страница 171: ...Date Code 20011026 Event Reporting 4 9 SEL 321 321 1 Instruction Manual ...
Страница 263: ...SEL DIRECTION AND POLARITY CHECK FORM ...
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