CHAP
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Figure 7-40. Example of Flyby Block Transfer Timing (from External SRAM to External I/O Connected to NT85E500)
VMTTYP1, VMTTYP0
(Output)
VMA27 to VMA0 (Output)
VMWRITE (Output)
VMSTZ (Output)
VMWAIT (Input)
VMAHLD (Input)
VMLAST (Input)
VBDI31 to VBDI0 (Input)
VMBENZ3 to VMBENZ0
(Output)
VMCTYP2 to VMCTYP0
(Output)
VMSIZE1, VMSIZE0
(Output)
VDCSZ7 to VDCSZ0
(Output)
DI31 to DI0 (Input)
Note
RDZ (Output)
Note
A25 to A0 (Output)
Note
VMSEQ2 to VMSEQ0
(Output)
VBCLK (Input)
VBDC (Output)
DMARQn (Input)
DMACTVn (Output)
DMTCOn (Output)
WRZ3 to WRZ0 (Output)
Note
CSZ7 to CSZ0 (Output)
Note
VMLOCK (Output)
0H
FH
FFH
L
L
FH
FFH
1st
T1
T2
T3
L
0H
FH
7H
L
FBH
FFH
IORDZ (Output)
Note
IOWRZ (Output)
Note
H
FFH
2nd
T1
T2
T3
3rd
T1
T2
T3
4th
T1
T2
T3
5th
T1
T2
T3
6th
T1
T2
T3
7th
T1
T2
T3
8th
T1
T2
T3
2H
2H
3H
2H
2H
3H
2H
2H
3H
2H
2H
3H
2H
2H
3H
2H
2H
3H
2H
2H
3H
2H
2H
3H
0H
0H
2H
FBH
VBDO31 to VBDO0 (Output)
DO31 to DO0 (Output)
Note
L
L
VBDV (Output)
L
L
Note
These are NT85E500 signals.