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1159
Failure Diagnosis Instructions
Section 3-30
The logic diagnosis function is executed every cycle as long as the execution
condition for FPD(269) is ON. The operation of the logic diagnosis function is
independent of the time monitoring function.
When two or more input bits are preventing the diagnostic output from being
turned ON, the address of the first input bit in the execution condition (on the
highest instruction line and nearest the left bus bar) will be output to R+2
through R+4.
Input bits in LD, LD NOT, AND, AND NOT, OR, and OR NOT instructions
(including differentiated and immediate-refreshing variations) will be checked
by the logic diagnosis function. Input bits in other instructions and operands
addressed indirectly through Index Registers will not be checked.
The logic diagnosis block begins with the first LD (not LD TR) or LD NOT
instruction after FPD(269) and ends with the first OUT (not OUT TR) or other
right-hand instruction.
There are two diagnostic output modes, set with the leftmost digit of C.
1,2,3...
1.
Bit address output mode (Leftmost digit of C = 0)
Bit 15 of R (the Bit Address Found Flag) is turned ON when an input bit
address has been found and bit 14 of R indicates whether the input is nor-
mally ON or normally OFF.
The 8-digit hexadecimal PLC memory address of the input bit is output to
R+3 and R+2.
2.
Bit address and message output mode (Leftmost digit of C = 8)
Bit 15 of R (the Bit Address Found Flag) is turned ON when an input bit
address has been found and bit 14 of R indicates whether the input is nor-
mally ON or normally OFF.
The input bit’s address is output to R+2 through R+4 as 6 ASCII charac-
ters.
Register Word Functions
The register words contain the results of the diagnostic function and can also
contain an ASCII error message which is displayed when an error is gener-
ated by the time monitoring function. The function of the register words
depends upon the diagnostic output mode which is set with the leftmost digit
of C.
Содержание SYSMAC CS Series
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Страница 186: ...146 List of Instructions by Function Code Section 2 4 ...
Страница 194: ...154 3 35 4 MOVE BIT MOVBC 568 1273 3 35 5 BIT COUNTER BCNTC 621 1275 3 35 6 GET VARIABLE ID GETID 286 1277 ...
Страница 1320: ...1280 Model Conversion Instructions Unit Ver 3 0 or Later Section 3 35 ...
Страница 1390: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2 ...
Страница 1391: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits ...
Страница 1392: ...1352 ASCII Code Table Appendix A ...
Страница 1404: ...1364 Revision History ...