Omron SYSMAC CS Series, Справочное руководство, Страница: 207 / 1405

167
Sequence Input Instructions
Section 3-3
Example
3-3-4 AND NOT: AND NOT
Purpose Reverses the status of the specified operand bit and takes a logical AND with
the current execution condition.
Ladder Symbol
Variations
Note 1. The following variations are supported by only the CS1-H, CJ1-H, CJ1M,
or CS1D CPU Units: @AND NOT, %AND NOT, !@AND NOT, and !%AND
NOT.
2. Immediate refreshing is not supported by CS1D CPU Units for Duplex-
CPU Systems.
3. Combined variations are supported by CS1D CPU Units for Single-CPU
Systems and CS1-H, CJ1-H, and CJ1M CPU Units only.
Applicable Program Areas
Operand Specifications
Instruction Operand
LD 000000
AND 000001
LD 000002
AND 000003
LD 000004
AND NOT 000005
OR LD ---
AND LD ---
OUT 000006
Variations Creates ON Each Cycle AND NOT Result is ON AND NOT
Creates ON Once for Upward Differentiation (See
note 1.) @AND NOT
Creates ON Once for Downward Differentiation (See
note 1.) %AND NOT
Immediate Refreshing Specification (See note 2.) !AND NOT
Combined
Variations Refreshes Input Bit and Creates ON Once for
Upward Differentiation (See note 3.) !@AND NOT
Refreshes Input Bit and Creates ON Once for
Downward Differentiation (See note 3.) !%AND NOT
Block program areas Step program areas Subroutines Interrupt tasks
OK OK OK OK
Area AND NOT bit operand
CIO Area CIO 000000 to CIO 614315
Work Area W00000 to W51115