77
Shared Memory Setting
Counter setting
Setting the operation mode for each counter CH.
In the example, the phase signal from encoder is input to R0.0 and
R0.1, and counter function is used in 1 multiplication phase input
mode, and therefore enter
「
FFFFFF20
」
to shared memory addresses
100h and 101h.
Shared Memory 100h, 101h Settings
Counter Current Value Setting
Enter
「
K5000 (H1388)
」
as count initial value in the shared memory
addresses 108h and 109h where the counter current value of CH0 is
stored.
Shared Memory 108h, 109h Settings
Setting the Comparison Output Set Value
Setting the Comparison output set value to be compared with Counter
current value.
In the example, enter
「
K0 (H0)
」
in shared memory addresses
120h,
121h and
「
K250 (H FA)
」
in 122h, 123h, to output CMP0 when counter
current value is 0 and CMP1 when 250.
Shared memory 120h, 121h settings
Shared Memory 122h, 123h Settings
R0.13
R0.12
R0.9
R0.8
R0.5
R0.4
R0.1
R0.0
CH3
CH2
CH1
CH0
Input
mode
Functions
setting
Input
mode
Functions
setting
Input
mode
Functions
setting
Input
mode
Functions
setting
F
F
F
F
F
F
2
0
Unused
Unused
Unused
Unused
Unused
Unused
Phase
input
Terminal
input
External input
Setting item
(bit) 32
Counter
number
Set value
Settings
16 15
0
Comparison output set value (for CMP0)
F
F
0
0
1
3
8
8
K 5000
Setting item
(bit) 32
Set value
Settings
16 15
0
Comparison output set value (for CMP0)
0
0
0
0
0
0
0
0
K0
Setting item
(bit) 32
Set value
Settings
16 15
0
Comparison output set value (for CMP2)
0
0
0
0
0
0
F
A
K250
Setting item
(bit) 32
Set value
Settings
16 15
0