86
Shared Memory Setting
Counter Setting
Setting the operation mode for each counter CH.
In the example, the phase signal from encoder is input to R0.0 and
R0.1, and counter function is used in 1 multiplication phase input
mode; therefore, enter
「
FFFFFF20
」
to shared memory addresses
100h and 101h.
Shared Memory 100h, 101h Settings
Setting the Comparison Output Set Value
Setting the operation mode for each counter CH.
In the example,
「
K2000(H 7D0)
」
,
「
K-1500(H FFFFFA24)
」
,
「
K-2000(H
FFFFF830)
」
,
「
K3000(H BB8)
」
,
「
K0(H 0)
」
are input to shared memory
addresses 120h and 121h in sequential order.
Shared Memory 120h, 121h Settings (Target Value 1)
Shared Memory 120h, 121h Settings (Target Value 2)
R0.
13
R0.12
R0.9
R0.8
R0.5
R0.4
R0.1
R0.0
CH3
CH2
CH1
CH0
Input
mode
Functions
setting
Input
mode
Functions
setting
Input
mode
Functions
setting
Input
mode
Functions
setting
F
F
F
F
F
F
2
0
Unused
Unused
Unused
Unused
Unused
Unused
Phase
input
Terminal
input
External input
Setting item
(bit) 32
Counter
number
Set value
Settings
16 15
0
Comparison output set value (for CMP0)
0
0
0
0
0
2
D
0
K 2000
Setting item
(bit) 32
Set value
Settings
16 15
0
Comparison output set value (for CMP1)
F
F
F
F
F
A
2
4
K-1500
Setting item
(bit) 32
Set value
Settings
16 15
0