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Shared Memory Setting
PLS/PWM Setting
Pulse output form is determined by PLS/PWM setting.
In this example, enter
「
FFFFFFF0
」
into shared memory addresses
140h and 141h. In data refreshing direction control mode, PWM output
starts from R2.12 (PWM0) when PLSx Start signal edge rises.
Shared memory 140h, 141h settings
PLS/PWM frequency setting
This setting determines the frequency of PWM output.
In this example, enter
「
K10000(H2710)
」
into shared memory
addresses 148h and 149h. PWM output starts from R2.12 (PWM0) at
10 kHz.
Shared memory 148h, 149h settings
PWM Duty Setting
This setting determines Duty of PWM output.
In this example, enter K50 (H32) into shared memory addresses 158h
and 159h. PWM output starts from R2.12 (PWM0) at 50% Duty.
Shared Memory 158h, 159h Settings
Unused
Unused
Unused
Unused
PWM3
PWM2
PWM1
PWM0
Unused
Unused
Unused
Unused
Form
setting
Form
setting
Form
setting
Form setting
F
F
F
F
F
F
F
0
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Data refresh by
Start signal
Output number
(bit) 32
Setting item
Set value
Settings
16 15
0
PLS0/PWM0 frequency setting
0
0
0
0
2
7
1
0
K 10000
Setting item
(bit) 32
Set value
16 15
0
Settings
PWM0/PWM0 Duty setting
0
0
0
0
0
0
3
2
K 50
Setting item
(bit) 32
Set value
16 15
0
Settings