MS51
Nov. 28, 2019
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34
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Rev 1.00
MS51
32K
SE
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CHNICAL RE
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UAL
6.1.6
Data Memory
internal Data Memory
6.1.6.1
Upper 128 Bytes
internal RAM
(indirect addressing)
00H
7FH
80H
FFH
Lower 128 Bytes
internal RAM
(direct or indirect
addressing)
SFR
(direct addressing)
0000H
07FFH
2 KBytes XRAM
(MOVX addressing)
Figure 6.1-5 Data Memory Map
Figure 6.1-5 Data Memory Map shows the internal Data Memory spaces available on MS51. Internal
Data Memory occupies a separate address space from Program Memory. The internal Data Memory
can be divided into three blocks. They are the lower 128 bytes of RAM, the upper 128 bytes of RAM,
and the 128 bytes of SFR space. Internal Data Memory addresses are always 8-bit wide, which
implies an address space of only 256 bytes. Direct addressing higher than 7FH will access the special
function registers (SFR) space and indirect addressing higher than 7FH will access the upper 128
bytes of RAM. Although the SFR space and the upper 128 bytes of RAM share the same logic
address, 80H through FFH, actually they are physically separate entities. Direct addressing to
distinguish with the higher 128 bytes of RAM can only access these SFR. Sixteen addresses in SFR
space are either byte-addressable or bit-addressable. The bit-addressable SFR are those whose
addresses end in 0H or 8H.
The lower 128 bytes of internal RAM are present in all 80C51 devices. The lowest 32 bytes as general
purpose registers are grouped into 4 banks of 8 registers. Program instructions call these registers as
R0 to R7. Two bits RS0 and RS1 in the Program Status Word (PSW[3:4]) select which Register Bank
is used. It benefits more efficiency of code space, since register instructions are shorter than
instructions that use direct addressing. The next 16 bytes above the general purpose registers (byte-
address 20H through 2FH) form a block of bit-addressable memory space (bit-address 00H through
7FH). The 80C51 instruction set includes a wide selection of single-bit instructions, and the 128 bits in
this area can be directly addressed by these instructions. The bit addresses in this area are 00H
through 7FH.
Either direct or indirect addressing can access the lower 128 bytes space. However, the upper 128
bytes can only be accessed by indirect addressing.
Another application implemented with the whole block of internal 256 bytes RAM is used for the stack.
This area is selected by the Stack Pointer (SP), which stores the address of the top of the stack.
Whenever a JMP, CALL or interrupt is invoked, the return address is placed on the stack. There is no
restriction as to where the stack can begin in the RAM. By default however, the Stack Pointer contains
07H at reset. User can then change this to any value desired. The SP will point to the last used value.
Therefore, the SP will be incremented and then address saved onto the stack. Conversely, while
popping from the stack the contents will be read first, and then the SP is decreased.
