CHAPTER 8 TIMER/COUNTER FUNCTION
User’s Manual U15109EJ3V0UD
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8.3.2 Configuration
Timer n includes the following hardware.
Table 8-5. Configuration of Timers 5 and 6
Item
Configuration
Timer registers
16-bit counters 5, 6 (TM5, TM6)
Registers
16-bit compare registers 5, 6 (CR5, CR6)
Timer outputs
TO5, TO6
Control registers
Timer clock select registers 50, 51, 60, and 61 (TCL50, TCL51, TCL60, and TCL61)
8-bit timer mode control registers 50 and 60 (TMC50, TMC60)
(1) 16-bit counters 5, 6 (TM5, TM6)
TMn is a 16-bit read-only register that counts the count pulses.
The counter is incremented in synchronization with the rising edge of the count clock.
When the count is read out during operation, the count clock input temporarily stops and the count is read at that
time. In the following cases, the count becomes 0000H.
(1) When RESET is input.
(2) When TCEn is cleared.
(3) When TMn and CRn match in the clear & start mode that is entered when TMn and CRn0 match.
Remark
n = 5, 6
(2) 16-bit compare registers 5, 6 (CR5, CR6)
The value set in CRn is always compared to the count in 16-bit counter n (TMn). If the two values match, an
interrupt request (INTTMn) is generated (except in the PWM mode).
Remark
n = 5, 6
