Chapter 6
Digital I/O
©
National Instruments
6-7
X Series User Manual
Routing DI Sample Clock to an Output Terminal
Yo
u
can ro
u
te DI Sample Clock o
u
t to any PFI <0..15> terminal. The PFI
circ
u
itry inverts the polarity of DI Sample Clock before driving the PFI
terminal.
Other Timing Requirements
Yo
u
r DAQ device only acq
u
ires data d
u
ring an acq
u
isition. The device
ignores DI Sample Clock when a meas
u
rement acq
u
isition is not in
progress. D
u
ring a meas
u
rement acq
u
isition, yo
u
can ca
u
se yo
u
r DAQ
device to ignore DI Sample Clock
u
sing the DI Pa
u
se Trigger signal.
The DI timing engine on yo
u
r device internally generates DI Sample Clock
u
nless yo
u
select some external so
u
rce. DI Start Trigger starts this timing
engine and either software or hardware can stop it once a finite acq
u
isition
completes. When
u
sing the DI timing engine, yo
u
also can specify a
config
u
rable delay from DI Start Trigger to the first DI Sample Clock
p
u
lse.
By defa
u
lt, this delay is set to two ticks of the DI Sample Clock Timebase
signal.
Figure 6-3.
DI Sample Clock and DI Start Trigger
DI Sample Clock Timebase Signal
Yo
u
can ro
u
te any of the following signals to be the DI Sample Clock
Timebase (di/SampleClockTimebase) signal:
•
100 MHz Timebase (defa
u
lt)
•
20 MHz Timebase
•
100 kHz Timebase
DI
Sa
mple Clock Time
bas
e
DI
S
t
a
rt Trigger
DI
Sa
mple Clock
Del
a
y
From
S
t
a
rt
Trigger
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