Chapter 4
Analog Input
X Series User Manual
4-56
ni.com
Fig
u
re 4-30 shows the relationship of AI Sample Clock to AI Start Trigger.
Figure 4-30.
AI Sample Clock and AI Start Trigger
AI Sample Clock Timebase Signal
Yo
u
can ro
u
te any of the following signals to be the AI Sample Clock
Timebase (ai/SampleClockTimebase) signal:
•
100 MHz Timebase (defa
u
lt)
•
20 MHz Timebase
•
100 kHz Timebase
•
PXI_CLK10
•
RTSI <0..7>
•
PFI <0..15>
•
PXI_STAR
•
PXIe-DSTAR<A,B>
•
Analog Comparison Event (an analog trigger)
AI Sample Clock Timebase is not available as an o
u
tp
u
t on the I/O
connector. AI Sample Clock Timebase is divided down to provide one of
the possible so
u
rces for AI Sample Clock. Yo
u
can config
u
re the polarity
selection for AI Sample Clock Timebase as either rising or falling edge,
except on 100 MHz Timebase or 20 MHz Timebase.
AI
Sa
mple Clock Time
bas
e
AI
S
t
a
rt Trigger
AI
Sa
mple Clock
Del
a
y
From
S
t
a
rt
Trigger
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