Chapter 7
Counters
X Series User Manual
7-28
ni.com
Implicit Buffered Two-Signal Edge-Separation
Measurement
Implicit b
u
ffered and single two-signal edge-separation meas
u
rements are
similar, b
u
t implicit b
u
ffered meas
u
rement meas
u
res m
u
ltiple intervals.
The co
u
nter co
u
nts the n
u
mber of rising (or falling) edges on the So
u
rce inp
u
t
occ
u
rring between an active edge of the Gate signal and an active edge of the
A
u
x signal. The co
u
nter then stores the co
u
nt in the FIFO. On the next active
edge of the Gate signal, the co
u
nter begins another meas
u
rement. A DMA
controller transfers the stored val
u
es to host memory.
Fig
u
re 7-25 shows an example of an implicit b
u
ffered two-signal
edge-separation meas
u
rement.
Figure 7-25.
Implicit Buffered Two-Signal Edge-Separation Measurement
Sample Clocked Buffered Two-Signal Separation
Measurement
A sample clocked b
u
ffered two-signal separation meas
u
rement is similar to
single two-signal separation meas
u
rement, b
u
t b
u
ffered two-signal
separation meas
u
rement takes meas
u
rements over m
u
ltiple intervals
correlated to a sample clock. The co
u
nter co
u
nts the n
u
mber of rising (or
falling) edges on the So
u
rce inp
u
t occ
u
rring between an active edge of the
Gate signal and an active edge of the A
u
x signal. The co
u
nter then stores
the co
u
nt in the FIFO on a sample clock edge. On the next active edge of
the Gate signal, the co
u
nter begins another meas
u
rement. A DMA
controller transfers the stored val
u
es to host memory.
S
OURCE
Co
u
nter V
a
l
u
e
B
u
ffer
AUX
GATE
1 2
3
1
2
3
1
2
3
3
3
3
3
3
3
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