Chapter 7
Counters
X Series User Manual
7-40
ni.com
Pulse Generation for ETS
In the eq
u
ivalent time sampling (ETS) application, the co
u
nter prod
u
ces a
p
u
lse on the o
u
tp
u
t a specified delay after an active edge on Gate. After
each active edge on Gate, the co
u
nter c
u
m
u
latively increments the delay
between the Gate and the p
u
lse on the o
u
tp
u
t by a specified amo
u
nt. Th
u
s,
the delay between the Gate and the p
u
lse prod
u
ced s
u
ccessively increases.
The increase in the delay val
u
e can be between 0 and 255. For instance, if
yo
u
specify the increment to be 10, the delay between the active Gate edge
and the p
u
lse on the o
u
tp
u
t increases by 10 every time a new p
u
lse is
generated.
S
u
ppose yo
u
program yo
u
r co
u
nter to generate p
u
lses with a delay of 100
and p
u
lse width of 200 each time it receives a trigger. F
u
rthermore, s
u
ppose
yo
u
specify the delay increment to be 10. On the first trigger, yo
u
r p
u
lse
delay will be 100, on the second it will be 110, on the third it will be 120;
the process will repeat in this manner
u
ntil the co
u
nter is disarmed. The
co
u
nter ignores any Gate edge that is received while the p
u
lse triggered by
the previo
u
s Gate edge is in progress.
The waveform th
u
s prod
u
ced at the co
u
nter’s o
u
tp
u
t can be
u
sed to provide
timing for
u
ndersampling applications where a digitizing system can
sample repetitive waveforms that are higher in freq
u
ency than the Nyq
u
ist
freq
u
ency of the system. Fig
u
re 7-38 shows an example of p
u
lse generation
for ETS; the delay from the trigger to the p
u
lse increases after each
s
u
bseq
u
ent Gate active edge.
Figure 7-38.
Pulse Generation for ETS
For information abo
u
t connecting co
u
nter signals, refer to the
Default
Counter/Timer Pinouts
section.
OUT
D1
D2 = D1 +
Δ
D
D
3
= D1 + 2
Δ
D
GATE
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