Chapter 2
DAQ System Overview
X Series User Manual
2-2
ni.com
Figure 2-2.
General X Series Block Diagram
DAQ-STC3
The DAQ-STC3 and DAQ-6202 implement a high-performance digital
engine for X Series data acq
u
isition hardware. Some key feat
u
res of this
engine incl
u
de the following:
•
Flexible AI and AO sample and convert timing
•
Many triggering modes
•
Independent AI, AO, DI, DO, and co
u
nter FIFOs
•
Generation and ro
u
ting of RTSI signals for m
u
lti-device
synchronization
•
Generation and ro
u
ting of internal and external timing signals
•
Fo
u
r flexible 32-bit co
u
nter/timer mod
u
les with hardware gating
•
Digital waveform acq
u
isition and generation
•
Static DIO signals
•
Tr
u
e 5 V high c
u
rrent drive DO
•
DI change detection
•
DO watchdog timers
•
PLL for clock synchronization
•
Seamless interface to signal conditioning accessories
•
PCI Express/PXI Express interface
•
Independent scatter-gather DMA controllers for all acq
u
isition and
generation f
u
nctions
An
a
log O
u
tp
u
t
Digit
a
l I/O
An
a
log Inp
u
t
Co
u
nter
s
PFI
Digit
a
l
Ro
u
ting
a
nd Clock
Gener
a
tion
B
us
Interf
a
ce
B
us
I/O Connector
RT
S
I
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