ICS ELECTRONICS 4809A, Инструкция по эксплуатации, Страница: 117 / 131

A-18
A2
With asynchronous characters, the receiver normally uses the start bit to
synchronize its internal clock. However, some devices, such as the higher
speed modems, require the data bits to be synchronized with their clock.
These units are referred to as synchronous modems (not the same as syn-
chronous data characters) and they will supply the clock signals to both the
transmitting and receiving device.
Another aspect of timing is the control of data transmission to avoid data
overrun. The two methods used are control signals and X-on/X-off char-
acters.
For the control signal method, extra wires are provided in the cable for
handshake signals that enable or inhibit data flow. The more common
control signal pairs are:
Request-to-send / Clear-to-send
Data-terminal-ready / Data-set-ready
All signals must be high to enable data transmission. Dropping any line
normally means the receiving device's buffer is full or it is busy with the
last message.
Another method of controlling the data flow is to imbed X-on/X-off char-
acters in the data message. At turn on, both devices are initially in the
X-on state. When one device becomes full, it sends the other an X-off
character to inhibit future data transmission. X-on is then sent to restart
the data transmission when there is room in the receiving device's buffer
for additional data.
The 2303's Serial Interface normally uses asynchronous 8 bit data characters
with no parity and single start and stop bits. The 2303 will also work with
7 bit data characters. The unused data bits are outputted on the 488 Bus
as fixed zeros. The user can also add a parity bit and the second stop bit if
required for his system.
A2.2 RS-232 Standard
In 1963, the Electronic Industry Association (EIA) established a standard to
govern the interface between data terminal equipment and data communi-
cation equipment employing serial binary interchange. The latest revision