Rev. 6.0, 07/02, page 742 of 986
18.2
Register Descriptions
18.2.1
Port Control Register A (PCTRA)
Port control register A (PCTRA) is a 32-bit readable/writable register that controls the
input/output direction and pull-up for each bit in the 16-bit port (port 15 pin to port 0 pin). As the
initial value of port data register A (PDTRA) is undefined, all the bits in the 16-bit port should be
set to output with PCTRA after writing a value to the PDTRA register.
PCTRA is initialized to H'00000000 by a power-on reset. It is not initialized by a manual reset or
in standby mode, and retains its contents.
Bit:
31
30
29
28
27
26
25
24
PB15PUP
PB15IO
PB14PUP
PB14IO
PB13PUP
PB13IO
PB12PUP
PB12IO
Initial value:
0
0
0
0
0
0
0
0
R/W:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
23
22
21
20
19
18
17
16
PB11PUP
PB11IO
PB10PUP
PB10IO
PB9PUP
PB9IO
PB8PUP
PB8IO
Initial value:
0
0
0
0
0
0
0
0
R/W:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
15
14
13
12
11
10
9
8
PB7PUP
PB7IO
PB6PUP
PB6IO
PB5PUP
PB5IO
PB4PUP
PB4IO
Initial value:
0
0
0
0
0
0
0
0
R/W:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
7
6
5
4
3
2
1
0
PB3PUP
PB3IO
PB2PUP
PB2IO
PB1PUP
PB1IO
PB0PUP
PB0IO
Initial value:
0
0
0
0
0
0
0
0
R/W:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Содержание SH7750 series
Страница 106: ...Rev 6 0 07 02 page 56 of 986 ...
Страница 144: ...Rev 6 0 07 02 page 94 of 986 ...
Страница 242: ...Rev 6 0 07 02 page 192 of 986 ...
Страница 270: ...Rev 6 0 07 02 page 220 of 986 ...
Страница 360: ...Rev 6 0 07 02 page 310 of 986 ...
Страница 538: ...Rev 6 0 07 02 page 488 of 986 ...
Страница 706: ...Rev 6 0 07 02 page 656 of 986 ...
Страница 752: ...Rev 6 0 07 02 page 702 of 986 ...
Страница 780: ...Rev 6 0 07 02 page 730 of 986 ...
Страница 822: ...Rev 6 0 07 02 page 772 of 986 ...
Страница 986: ...Rev 6 0 07 02 page 936 of 986 ...
Страница 1030: ...Rev 6 0 07 02 page 980 of 986 ...
Страница 1036: ...Rev 6 0 07 02 page 986 of 986 ...