196
7 . 5 . 7
UGM Read Cycle Timing
UGM Single Read Cycle Timing
MA11 to MA0 (output)
CLK0 (input)/CLKi
(multiplication off/
multiplication on)
MRAS1
,
MRAS0
(output)
MWE
(output)
MOE
(output)
MD15 to MD0
(input/output)
MLCAS
,
MUCAS
(output)
t
ROWH
t
RASD
t
CADD
t
RASD
T1
T2
T3
T4
T5
T1
T2
T3
T4
t
RASD
t
OED
t
OED
t
OERD
t
CASD
t
CASD
t
CASD
t
MDH1
t
MDI1
t
MDON
Q2 input
Q2 output
Q2 output
t
MDOF
t
MDON
RAS
RAS
t
COMH
t
COMS
t
ROWS
CAS
Figure 7-11 UGM (EDO-DRAM) Single Read Cycle Timing
Содержание HD64411 Q2
Страница 17: ...10 ...
Страница 31: ...24 ...
Страница 108: ...101 Example 0 0 Work coordinates Rendering coordinates XC YC ...
Страница 110: ...103 Example Old XC YC Old XC XC old YC YC 0 0 Work coordinates Rendering coordinates XC YC ...
Страница 112: ...105 Example 0 0 Work coordinates Rendering coordinates XO1 YO1 XO1 DX2 YO1 DY2 XO1 DX1 YO1 DY1 LINE ...
Страница 116: ...109 Example 0 0 Work coordinates Rendering coordinates XMIN YMIN XMAX YMAX ...
Страница 118: ...111 Example 0 0 Work coordinates Rendering coordinates XMAX YMAX ...
Страница 120: ...113 Example 0 0 Work coordinates XMIN YMIN XMAX YMAX ...
Страница 129: ...122 ...
Страница 167: ...160 ...
Страница 179: ...172 ...
Страница 213: ...206 Figure 7 20 TV Sync Mode Display Timing When DOT 0 or DOT 1 and EXHSYNC cycle is even multiple of CLK1 cycle ...