Table 21-7 Timing of On-Chip Supporting Modules (cont)
Condition A: V
CC
= 2.7 V to 5.5 V, AV
CC
= 2.7 V to 5.5 V, V
REF
= 2.7 V to AV
CC
,
V
SS
= AV
SS
= 0 V, ø = 1 MHz to 8 MHz, T
a
= –20°C to +75°C (regular
specifications), T
a
= –40°C to +85°C (wide-range specifications)
Condition B: V
CC
= 3.15 V to 5.5 V, AV
CC
= 3.15 V to 5.5 V, V
REF
= 3.15 V to AV
CC
,
V
SS
= AV
SS
= 0 V, ø = 1 MHz to 13 MHz, T
a
= –20°C to +75°C (regular
specifications), T
a
= –40°C to +85°C (wide-range specifications)
Condition C: V
CC
= 5.0 V ± 10%, AV
CC
= 5.0 V ± 10%, V
REF
= 4.5 V to AV
CC
,
V
SS
= AV
SS
= 0 V, ø = 1 MHz to 18 MHz, T
a
= –20°C to +75°C (regular
specifications), T
a
= –40°C to +85°C (wide-range specifications)
Condition A
Condition B
Condition C
8 MHz
13 MHz
16 MHz
18 MHz
Item
Symbol Min Max Min
Max Min Max Min Max Unit
SCI
Transmit data
t
TXD
—
100
—
100
—
100
—
100 ns
Figure 21-27
delay time
Receive data
t
RXS
100 —
100
—
100 —
100 —
setup time
(synchronous)
Clock input
t
RXH
100 —
100
—
100 —
100 —
Clock output
0
—
0
—
0
—
0
—
Output data
t
PWD
—
100
—
100
—
100
—
100 ns
Figure 21-23
delay time
Input data
t
PRS
50
—
50
—
50
—
50
—
setup time
Input data
t
PRH
50
—
50
—
50
—
50
—
hold time
Figure 21-3 Output Load Circuit
C
R
H
5 V
R
L
H8/3048 Series
output pin
C = 90 pF: ports 4, 5, 6, 8, A (19 to 0), D (15 to 8), ø
C = 30 pF: ports 9, A, B, RESO
Input/output timing measurement levels
• Low: 0.8 V
• High: 2.0 V
R = 2.4 k
R = 12 k
L
H
Ω
Ω
Test
Conditions
Receive data
hold time
(synchronous)
Ports
and
TPC
671
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