;
Execute erase-verify
EVR: MOV.W R6, R0 ;
R0: EBR1/EBR2
SUB.W R1, R1 ;
R1: used to test R1-th bit in R0
;
#RAMSTR is starting destination address to which program is transferred in RAM
MOV.L #RAMSTR:32, ER2 ;
Starting transfer destination address (RAM)
ADD.L #ERVADR:32, ER2 ;
# #ERVADR
→
ER2
SUB.L #START:32, ER2 ;
ER2: address of data area used in RAM
MOV.B #48, R5H ;
MOV.B R5H, @FLMCR:8 ;
Set EV bit
MOV.W #e , R5 ;
R5: set erase-verify loop counter
LOOPEV: DEC.W #1, R5 ;
Program
BPL LOOPEV ;
Wait
EBRTST: CMP.B #10, R1L ;
R1L = #10?
BEQ HANTEI ;
If finished checking all R0 bits, branch to HANTEI
CMP.B #08, R1L ;
BCC BC1 ;
BTST R1L, R0H ;
Test R1-th bit in R0H (EBR1)
BNE ERSEVF ;
BRA ADD01 ;
BC1: BTST R1L, R0L ;
Test R1-th bit in R0L (EBR2)
BNE ERSEVF ;
If R1-th bit in R0 is 1, branch to ERSEVF
ADD01: INC.B R1L ;
R1L + 1
→
R1L
MOV.L @ER2+, ER3 ;
Dummy-increment R2
BRA EBRTST ;
ERSEVF: MOV.L @ER2+, ER3 ;
ER3: top address of block to be erase-verified
MOV.L @ER2, ER4 ;
ER4: top address of next block
EVR2: MOV.B #FF, R5H ;
MOV.B R5H, @ER3 ;
Dummy write
MOV.W #h , R5 ;
R5: erase-verify loop counter
LOOPDW: DEC.W #1, R5 ;
BPL LOOPDW ;
Wait
MOV.B @ER3+, R5L ;
Read
CMP.B #FF, R5L ;
Read data = #FF?
BNE ADD02 ;
If read data
≠
#FF, branch to ADD02
CMP.L ER4, ER3 ;
Last address in block?
BNE EVR2 ;
If not last address in block, branch to EVR2
CMP.B #08, R1L ;
BCC BC2 ;
BCLR R1L, R0H ;
Clear R1L-th bit in R0H (EBR1)
BRA ADD02 ;
BC2: BCLR R1L, R0L ;
Clear R1L-th bit in R0L (EBR2)
ADD02: INC.B R1L ;
R1L + 1
→
R1L
BRA EBRTST ;
Erase-verify next erased block
604
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