Giga-tronics 2400/2500 Microwave Synthesizer Series
6. Status register System
Programming Manual, Part Number 34783, Rev A, July 2009
173
6.2 Status Byte and Service Request Enable Registers
The Status Byte Register is the primary status register. It is the top-level register used to track changes in
the state of the 2400/2500. The summary bits of lower-level status registers are set in the Status Byte
Register when certain conditions occur that are being monitored by and have been enabled in those
lower-level registers. The *STB? query can be used to read the contents of the Status Byte Register.
The Service Request Enable register controls which bits in the Status Byte Register can generate a
service request. The bits in the Service Request Enable Register are logically ANDed with the equivalent
bits in the Status Byte Register, and the results of those AND operations are logically ORed to produce a
service request. The RQS/MSS bit (bit 6) in the Status Byte Register is set when the logic OR operation
produces a service request. The *SRE command can be used to set the contents of the Service Request
Enable Register, and the *SRE? query can be used to read the contents of the Service Request Enable
Register.
Table 52 describes each bit in the Status Byte Register.
Table 52 Status Byte Register Bit Assignments
Bit
Function
Description
0
Local Control
Local Control. This bit is set whenever the Local button is pressed while the
source is in remote operation
1
Not Used
Not used. Always 0.
2
Error/Event
Error/Event. This bit is set whenever a SCPI error has occurred.
3
QUES Status
QUES Status (Questionable Status). This bit is set whenever a condition
defined in the questionable status register has occurred. See the section
entitled “Questionable Status Condition and Enable Registers”, below, for
details.
4
MAV
MAV. Message Available. This bit is set whenever a message is available.
5
ESB
ESB. Standard Event Status Register. This bit is set whenever a condition
defined in the Standard Event Status Register has occurred. See the
section entitled “Standard Event Status and Standard Event Status Enable
Registers”, below, for details.
6
RQS/MSS
RQS/MSS. Interrupt Request. This bit is set whenever an event identified
by the service request mask has occurred.
7
Not Used
Not used. Always 0.