357
CHAPTER 20 UART2, UART3
20.4.4
Reception and Transmission Data Register
(RDR2/RDR3 and TDR2/TDR3)
The reception data register (RDR2/RDR3) holds the received data. The transmission
data register (TDR2/TDR3) holds the transmission data. Both RDR2/RDR3 and TDR2/
TDR3 registers are located at the same address.
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Bit Configuration of Reception and Transmission Data Registers (RDR2/RDR3 and
TDR2/TDR3)
Figure 20.4-5 Transmission and Reception Data Registers (RDR2/RDR3 and TDR2/TDR3)
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Reception Data Register (RDR2/RDR3)
RDR2/RDR3 is the register that contains reception data. The serial data signal transmitted to the SIN2/
SIN3 pin is converted in the shift register and stored there. When the data length is 7 bits, the uppermost bit
(D7) contains "0". When reception is complete the data is stored in this register and the reception data full
flag bit (SSR2/SSR3: RDRF) is set to "1". If a reception interrupt request is enabled at this point, a
reception interrupt occurs.
Read RDR2/RDR3 when the RDRF bit of the status register (SSR2/SSR3) is "1". The RDRF bit is cleared
automatically to "0" when RDR2/RDR3 is read. Also the reception interrupt is cleared if it is enabled and no
error has occurred. For MB90V390H/MB90F394H(A), the RDRF bit is also cleared when a LIN break is
detected (LBD=1).
Data in RDR2/RDR3 is invalid when a reception error occurs (SSR2/SSR3: PE, ORE, or FRE = 1).
Initial value
0 0 0 0 0 0 0 0
B
[RDR2/RDR3]
R/W R/W R/W R/W
R/W
R/W
R/W R/W
bit 7 to 0
R/W
Data Registers
Read
Read from Reception Data Register
Write
Write to Tr ansmission Data Register
R/W: Readable and
w
ritable
7
6
5
4
3
2
1
0
Address:
bit
RDR3/TDR3: 00351A
H
RDR2/TDR2: 0035DA
H
1 1 1 1 1 1 1 1
B
[TDR2/TDR3]
Содержание MB90390 Series
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Страница 17: ...xiii APPENDIX D List of Interrupt Vectors 690 INDEX 695 ...
Страница 18: ...xiv ...
Страница 132: ...104 CHAPTER 5 CLOCKS ...
Страница 152: ...124 CHAPTER 6 CLOCK MODULATOR ...
Страница 210: ...182 CHAPTER 11 TIME BASE TIMER ...
Страница 218: ...190 CHAPTER 12 WATCHDOG TIMER ...
Страница 264: ...236 CHAPTER 14 16 BIT RELOAD TIMER WITH EVENT COUNT FUNCTION ...
Страница 274: ...246 CHAPTER 15 WATCH TIMER ...
Страница 306: ...278 CHAPTER 17 DTP EXTERNAL INTERRUPTS ...
Страница 338: ...310 CHAPTER 18 8 10 BIT A D CONVERTER ...
Страница 364: ...336 CHAPTER 19 UART0 UART1 ...
Страница 398: ...370 CHAPTER 20 UART2 UART3 Figure 20 5 2 ORE Set Timing Receive data RDRF ORE ...
Страница 432: ...404 CHAPTER 20 UART2 UART3 ...
Страница 482: ...454 CHAPTER 22 SERIAL I O ...
Страница 560: ...532 CHAPTER 24 STEPPING MOTOR CONTROLLER ...
Страница 582: ...554 CHAPTER 27 ROM MIRRORING MODULE ...
Страница 632: ...604 CHAPTER 29 EXAMPLES OF SERIAL PROGRAMMING CONNECTION ...
Страница 722: ...694 APPENDIX ...
Страница 723: ...695 INDEX The index follows on the next page This is listed in alphabetic order ...
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