705
Output Compare
.............................................. 203
Output Compare
(2 Channels per One Module)
Output Compare Register
.................................. 204
Output Compare Timing
Output Compare Timing
................................... 214
Output Data Register
Input Data Register (UIDR) and Output Data Register
(UODR)
............................................. 319
Output Waveform
Sample Output Waveform
when CMOD[1:0] = 00
B
.........................
210
Sample Output Waveform
when CMOD[1:0] = 10
B
.........................
212
Sample Output Waveform
when CMOD[1:0] = 11
B
.........................
213
Sample Output Waveform with Two Compare
Registers when CMOD[1:0] = 01
B
.........
211
Overall Control Registers
Overall Control Registers
.................................. 466
List of Overall Control Registers
Overrun
Receive Overrun
.............................................. 505
Overview
Overview
........................................................ 106
P
Package
Package Dimensions
.......................................... 12
PADR
Program Address Detection Registers (PADR0,
PADR1, PADR3 to PADR5)
Parity Bit
Parity Bit
......................................................... 328
PC
Program Counter (PC)
........................................ 44
Phase Modulation
Recommended Startup Sequence for Phase
Modulation Mode
............................... 121
Pin Assignment
Pin Assignment of
MB90394HA/MB90F394H(A)
Pin Assignment of MB90V390H
Pin Assignment of
MB90V390HA/MB90V390HB
Pin Functions
Pin Functions
..................................................... 13
PLL Clock
Selection of a PLL Clock Multiplier
PLL Clock Mode
Main Clock Mode and PLL Clock Mode
Port Data Register
Port Data Register
............................................ 172
Reading the Port Data Register
.......................... 173
PPG0 Operation Mode Control Register
PPG0 Operation Mode Control Register
(PPGC0)
.............................................255
PPG0/1 Clock Select Register
PPG0/1 Clock Select Register (PPG01)
PPG01
PPG0/1 Clock Select Register (PPG01)
PPG1 Operation Mode Control Register
PPG1 Operation Mode Control Register
(PPGC1)
.............................................257
PPGC0
PPG0 Operation Mode Control Register
(PPGC0)
.............................................255
PPGC1
PPG1 Operation Mode Control Register
(PPGC1)
.............................................257
Prefix
Bank Select Prefix
..............................................47
Common Register Bank Prefix (CMR)
Flag Change Disable Prefix (NCC)
Prefix Instruction
Restrictions on Interrupt Disable Instructions and
Prefix Instructions
..................................49
PRLH
Reload Register (PRLL/PRLH)
PRLL
Reload Register (PRLL/PRLH)
Processor Status
Processor Status (PS)
..........................................41
Product
Product Overview
.................................................2
Program Address Detection Registers
Program Address Detection Registers (PADR0,
PADR1, PADR3 to PADR5)
Program Counter
Program Counter (PC)
.........................................44
Programmer
Example of Minimum Connection to the Flash
Microcontroller Programmer (Power
Supplied From the Programmer)
Example of Serial Programming Connection (Power
Supplied From the Programmer)
Programming Flow Charts
Programming Flow Charts
.................................435
Protection Function
A/D Conversion Data Protection Function
PS
Processor Status (PS)
..........................................41
PSCCR
Configuration of the PLL and Special Configuration
Control Register (PSCCR)
Pulse Width
Relationship between 8/16-bit PPG Reload Value and
Содержание MB90390 Series
Страница 2: ......
Страница 4: ......
Страница 17: ...xiii APPENDIX D List of Interrupt Vectors 690 INDEX 695 ...
Страница 18: ...xiv ...
Страница 132: ...104 CHAPTER 5 CLOCKS ...
Страница 152: ...124 CHAPTER 6 CLOCK MODULATOR ...
Страница 210: ...182 CHAPTER 11 TIME BASE TIMER ...
Страница 218: ...190 CHAPTER 12 WATCHDOG TIMER ...
Страница 264: ...236 CHAPTER 14 16 BIT RELOAD TIMER WITH EVENT COUNT FUNCTION ...
Страница 274: ...246 CHAPTER 15 WATCH TIMER ...
Страница 306: ...278 CHAPTER 17 DTP EXTERNAL INTERRUPTS ...
Страница 338: ...310 CHAPTER 18 8 10 BIT A D CONVERTER ...
Страница 364: ...336 CHAPTER 19 UART0 UART1 ...
Страница 398: ...370 CHAPTER 20 UART2 UART3 Figure 20 5 2 ORE Set Timing Receive data RDRF ORE ...
Страница 432: ...404 CHAPTER 20 UART2 UART3 ...
Страница 482: ...454 CHAPTER 22 SERIAL I O ...
Страница 560: ...532 CHAPTER 24 STEPPING MOTOR CONTROLLER ...
Страница 582: ...554 CHAPTER 27 ROM MIRRORING MODULE ...
Страница 632: ...604 CHAPTER 29 EXAMPLES OF SERIAL PROGRAMMING CONNECTION ...
Страница 722: ...694 APPENDIX ...
Страница 723: ...695 INDEX The index follows on the next page This is listed in alphabetic order ...
Страница 740: ......