546
CHAPTER 26 ADDRESS MATCH DETECTION FUNCTION
■
Program Address Detection Control Status Register (PACSR)
The program address detection control / status register (PACSR) controls the operation of the address
detection function.
Figure 26.2-2 Program Address Detection Control Status Registers (PACSR0/PACSR1)
Initial value
0 0 0 0 0 0 0 0
B
R/W R/W R/W R/W
R/W R/W R/W R/W
R/W R/W R/W R/W R/W R/W
Address:
H
00009E
Reserved Reserved Reserved Reserved AD1E
AD0E
Reserved
Reserved
PACSR0
15 14 13 12 11 10
9
8
7
bit
bit
6
5
4
3
2
1
0
Initial value
0 0 0 0 0 0 0 0
B
R/W R/W
Address:
H
00003B
Reserved Reserved
Reserved AD4E
AD3E
Reserved
Reserved
PACSR1
AD5E
R/W
: Readable and
w
ritable
Table 26.2-2 Function of Each Bit of PACSR1 and PACSR0
Bit name
Function
bit15, bit14
Reserved bits
Bit15, bit14 are reserved. Set these bits to "0" before setting PACSR1.
bit13
AD5E:
Address detect
register 1 enable
The AD5E bit is the operation permission bit for PADR5.
When this bit is "1", the address is compared with the PADR5 register. If they match,
the INT9 instruction is issued.
bit12
Reserved bit
Bit12 is reserved. Set this bit to "0" before setting PACSR1.
bit11
AD4E:
Address detect
register 1 enable
The AD4E bit is the operation permission bit for PADR4.
When this bit is "1", the address is compared with the PADR4 register. If they match,
the INT9 instruction is issued.
bit10
Reserved bit
Bit10 is reserved. Set this bit to "0" before setting PACSR1.
bit9
AD3E:
Address detect
register 1 enable
The AD3E bit is the operation permission bit for PADR3.
When this bit is "1", the address is compared with the PADR3 register. If they match,
the INT9 instruction is issued.
bit8
Reserved bit
Bit8 is reserved. Set this bit to "0" before setting PACSR1.
bit7 to bit4
Reserved bits
Bit7 to bit4 are reserved. Set these bits to "0" before setting PACSR0.
bit3
AD1E:
Address detect
register 1 enable
The AD1E bit is the operation permission bit for PADR1.
When this bit is "1", the address is compared with the PADR1 register. If they match,
the INT9 instruction is issued.
bit2
Reserved bit
Bit2 is reserved. Set this bit to "0" before setting PACSR0.
bit1
AD0E:
Address detect
register 0 enable
The AD0E bit is the operation permission bit for PADR0.
When this bit is "1", the address is compared with the PADR0 register. If they match,
the INT9 instruction is issued.
bit0
Reserved bit
Bit0 is reserved. Set this bit to "0" before setting PACSR0.
Содержание MB90390 Series
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Страница 17: ...xiii APPENDIX D List of Interrupt Vectors 690 INDEX 695 ...
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Страница 132: ...104 CHAPTER 5 CLOCKS ...
Страница 152: ...124 CHAPTER 6 CLOCK MODULATOR ...
Страница 210: ...182 CHAPTER 11 TIME BASE TIMER ...
Страница 218: ...190 CHAPTER 12 WATCHDOG TIMER ...
Страница 264: ...236 CHAPTER 14 16 BIT RELOAD TIMER WITH EVENT COUNT FUNCTION ...
Страница 274: ...246 CHAPTER 15 WATCH TIMER ...
Страница 306: ...278 CHAPTER 17 DTP EXTERNAL INTERRUPTS ...
Страница 338: ...310 CHAPTER 18 8 10 BIT A D CONVERTER ...
Страница 364: ...336 CHAPTER 19 UART0 UART1 ...
Страница 398: ...370 CHAPTER 20 UART2 UART3 Figure 20 5 2 ORE Set Timing Receive data RDRF ORE ...
Страница 432: ...404 CHAPTER 20 UART2 UART3 ...
Страница 482: ...454 CHAPTER 22 SERIAL I O ...
Страница 560: ...532 CHAPTER 24 STEPPING MOTOR CONTROLLER ...
Страница 582: ...554 CHAPTER 27 ROM MIRRORING MODULE ...
Страница 632: ...604 CHAPTER 29 EXAMPLES OF SERIAL PROGRAMMING CONNECTION ...
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Страница 723: ...695 INDEX The index follows on the next page This is listed in alphabetic order ...
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