147
CHAPTER 8 LOW-POWER CONTROL CIRCUIT
8.4
CPU Intermittent Operation Mode
This mode is used for intermittent operation of the CPU while external buses and
peripheral functions continue to operate at high speeds. The purpose of this mode is to
reduce power consumption.
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CPU Intermittent Operation Mode
This mode halts the supply of the clock pulse to the CPU for a certain period. The halt occurs after the
execution of every instruction that accesses a register, built-in memory (ROM and RAM), I/O, peripheral
functions, or the external bus. Internal bus cycle activation is therefore delayed. While high-speed
peripheral clock pulses are supplied to peripheral functions, the execution speed of the CPU is reduced,
thereby enabling low-power consumption processing.
•
The low-power consumption mode control register (LPMCR: CG1 and CG0) is used to select the
number of clock pulses per halt cycle of the clock supplied to the CPU.
•
External bus operation uses the same clock as that used for peripheral functions.
•
Instruction execution time in the CPU intermittent mode can be calculated. A correction value should be
obtained by multiplying the execution count of instructions that access a register, internal memory,
internal peripheral functions, or the external bus by the number of clock pulses per halt cycle. Add this
corrective value to the normal execution time. Figure 8.4-1 shows the clock pulses during the CPU
intermittent operation.
Figure 8.4-1 Clock Pulses During the CPU Intermittent Operation
Peripheral clock
CPU clock
Halt cycle
Execution
cycle of one
instruction
Internal bus activation
Содержание MB90390 Series
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Страница 17: ...xiii APPENDIX D List of Interrupt Vectors 690 INDEX 695 ...
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Страница 132: ...104 CHAPTER 5 CLOCKS ...
Страница 152: ...124 CHAPTER 6 CLOCK MODULATOR ...
Страница 210: ...182 CHAPTER 11 TIME BASE TIMER ...
Страница 218: ...190 CHAPTER 12 WATCHDOG TIMER ...
Страница 264: ...236 CHAPTER 14 16 BIT RELOAD TIMER WITH EVENT COUNT FUNCTION ...
Страница 274: ...246 CHAPTER 15 WATCH TIMER ...
Страница 306: ...278 CHAPTER 17 DTP EXTERNAL INTERRUPTS ...
Страница 338: ...310 CHAPTER 18 8 10 BIT A D CONVERTER ...
Страница 364: ...336 CHAPTER 19 UART0 UART1 ...
Страница 398: ...370 CHAPTER 20 UART2 UART3 Figure 20 5 2 ORE Set Timing Receive data RDRF ORE ...
Страница 432: ...404 CHAPTER 20 UART2 UART3 ...
Страница 482: ...454 CHAPTER 22 SERIAL I O ...
Страница 560: ...532 CHAPTER 24 STEPPING MOTOR CONTROLLER ...
Страница 582: ...554 CHAPTER 27 ROM MIRRORING MODULE ...
Страница 632: ...604 CHAPTER 29 EXAMPLES OF SERIAL PROGRAMMING CONNECTION ...
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Страница 723: ...695 INDEX The index follows on the next page This is listed in alphabetic order ...
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