Fujitsu MB90390 Series, Руководство по оборудованию

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CHAPTER 13 16-BIT I/O TIMER
13.3.1 Data Register
The data register can read the count value of the 16-bit free-run timer. The counter value
is cleared to "0000
B
" upon a reset. The timer value can be set by writing a value to this
register. However, ensure that the value is written while the operation is stopped
(STOP=1).
The data register must be accessed by the word access instructions.
■
Data Register of Free-run Timer
Figure 13.3-2 Data Register of Free-run Timer (TCDT0/TCDT1)
The 16-bit free-run timer is initialized upon the following factors:
• Reset
• Clear bit (CLR) of control status register
• Free-run timer 0: A match between compare register 0 and the timer counter value.
• Free-run timer 1: A match between compare register 4 and the timer counter value.
7 6 5 4 3 2 1 0
Initial value
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
B
R/W R/W R/W R/W R/W R/W R/W
TCDT0/TCDT1
lo w er bits
Tn0 Timer Data Reg. 0
Tn1 Timer Data Reg. 1
Tn2 Timer Data Reg. 2
Tn3 Timer Data Reg. 3
Tn4 Timer Data Reg. 4
Tn5 Timer Data Reg. 5
Tn6 Timer Data Reg. 6
Tn7 Timer Data Reg. 7
n = 0, 1
TCDT0/TCDT1
upper bits
Tn8 Timer Data Reg. 8
Tn9 Timer Data Reg. 9
Tn10 Timer Data Reg. 10
Tn11 Timer Data Reg. 11
Tn12 Timer Data Reg. 12
Tn13 Timer Data Reg. 13
Tn14 Timer Data Reg. 14
Tn15 Timer Data Reg. 15
n = 0, 1
R/W : Readable and w ritable
15 14 13 12 11 10 9 8
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Address:
bit
352C
H
TCDT0/TCDT1
352D
H
353C
H
353D
H
bit0 to bit7
bit8 to bit15
Tn0 Tn1 Tn2 Tn3 Tn4 Tn5 Tn6 Tn7 Tn8 Tn9 Tn10 Tn11 Tn12 Tn13 Tn14 Tn15