99
CHAPTER 4 I/O PORTS
Table 4.5-4 summarizes the operating modes of the pin of port 5.
Note:
If the pull-up resistor is selected by using the pull-up setting register, the pin state will be "H" level
(pull-up state) instead of Hi-Z in stop mode (SPL = 1). During a reset, however, the pull-up is invalid
with the pin remaining at Hi-Z.
Table 4.5-4 Operating Modes of Pin of Port 5
Pin name
Normal operation, sleep, stop (SPL = 0)
Stop (SPL = 1)
At a reset
P50/PWM
General-purpose I/O port further may serve I/O for peripherals
Hi-Z
Hi-Z
SPL : Pin state setting bit of standby control register (STBC: SPL)
Hi-Z: High impedance
Содержание F2MC-8L F202RA
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Страница 32: ...16 CHAPTER 1 OVERVIEW ...
Страница 90: ...74 CHAPTER 3 CPU ...
Страница 142: ...126 CHAPTER 5 TIME BASE TIMER POPW A RETI ENDS END ...
Страница 150: ...134 CHAPTER 6 WATCHDOG TIMER ...
Страница 174: ...158 CHAPTER 7 8 BIT PWM TIMER User processing POPW A XCHW A T Restoring A and T POPW A RETI ENDS ...
Страница 176: ...160 CHAPTER 7 8 BIT PWM TIMER ...
Страница 220: ...204 CHAPTER 8 8 16 BIT CAPTURE TIMER COUNTER ...
Страница 240: ...224 CHAPTER 9 12 BIT PPG TIMER ...
Страница 258: ...242 CHAPTER 10 EXTERNAL INTERRUPT CIRCUIT 1 EDGE PUSHW A User processing POPW A XCHW A T POPW A RETI ENDS END ...
Страница 274: ...258 CHAPTER 11 EXTERNAL INTERRUPT CIRCUIT 2 LEVEL ...
Страница 362: ...346 CHAPTER 15 BUZZER OUTPUT ...
Страница 371: ...355 CHAPTER 16 WILD REGISTER FUNCTION 16 3 5 Data Test Set Register WROR A test register Do not access this register ...
Страница 390: ...374 CHAPTER 17 FLASH MEMORY ...
Страница 419: ...403 INDEX INDEX The index follows on the next page This is listed in alphabetic order ...
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